Patents by Inventor Kazuo Ishikura

Kazuo Ishikura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6611294
    Abstract: The present invention provides a movement correction frame count transformation apparatus for carrying out frame count transformation processing on a picture signal. In the apparatus, an input picture signal (S1) of interlaced scanning is converted into a signal (S2) of sequential scanning by an IP conversion unit (1). A movement detecting unit (3) detects movement detection signals (MD1 and MD2). A block unit movement vector searching unit (4) detects a block unit movement vector (BMV) by carrying out block matching processing. A movement vector correcting unit (5) carries out miniblock division processing to generate a movement vector (BV) if a movement correction error is equal to or greater than a threshold value. A pixel unit movement vector generating unit (6) generates a movement vector with a smallest error component between a frame signal of a current frame and a frame signal of an immediately preceding frame as a movement vector of a pixel.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: August 26, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Yasuhiro Hirano, Kazuo Ishikura, Masato Sugiyama, Mitsuo Nakajima, Yasutaka Tsuru, Takaaki Matono, Haruki Takata, Takashi Kanehachi
  • Patent number: 6509930
    Abstract: A low-cost motion-compensated picture signal scan conversion circuit ensuring high picture quality is to be provided. The circuit has a motion-adaptive first interpolation signal generator; a second motion-compensated interpolation signal generator; a motion vector detector; and a setting unit for checking the reliability of motion compensation by comparing signals from the second interpolation signal generator with signals on interlaced scanning lines, and setting the selection of signals from the first and second interpolation signal generators, wherein interlaced scanned signals are converted into progressive scanned signals by setting the threshold so that the threshold become smaller with an increase in the number of re-searched blocks in the detection of motion vectors.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: January 21, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Yasuhiro Hirano, Takaaki Matono, Haruki Takata, Takashi Hasegawa, Kazuo Ishikura, Masato Sugiyama, Mitsuo Nakajima, Yasutaka Tsuru
  • Patent number: 6144412
    Abstract: In order to carry out format conversion or scaling processing of picture signal by a memory having a small capacity, picture signals of interlace scanning are converted into picture signals of progressive scanning by interpolation by using an IP convertor 1 and a multiple scan convertor 3, a scaling processing of expansion and compression in the horizontal direction is firstly performed by using a horizontal scaling unit 5, processing of expansion, compression, frame rate conversion, synchronization and the like are secondly performed by using a vertical scaling unit 6 and commonly using memories used in scaling processing in the vertical direction and finally, color space conversion or inverse gamma processing is performed by using a picture quality improving unit 8 thereby converting the picture signals into picture signals S6 having a predetermined format.
    Type: Grant
    Filed: October 15, 1997
    Date of Patent: November 7, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Yasuhiro Hirano, Kazuo Ishikura, Masato Sugiyama, Mitsuo Nakajima, Shoji Kimura, Toshiyuki Kurita, Tsuguo Itagaki, Haruki Takata
  • Patent number: 5854636
    Abstract: A semiconductor integrated circuit having a two-dimensional array (MAR) and a parallel data transfer circuit (TRC) for transferring from the array data read out in parallel through data lines, in parallel to a processing circuit group (PE) by selecting the word lines of the two-dimensional memory array. The processing circuit group executing processing operations in parallel by using the data transferred from the parallel data transfer circuit. Each of the processing circuits having access to a plurality of series word lines and the data lines of the two-dimensional array through the parallel data transfer circuits. The arrangement of the parallel data transfer circuits allowing for an overlap range wherein data from each of the data lines of the memory array is available to more than one of the parallel data transfer circuits.
    Type: Grant
    Filed: September 16, 1997
    Date of Patent: December 29, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Takao Watanabe, Yoshinobu Nakagome, Kazuo Ishikura, Tetsuya Nakagawa, Atsushi Kiuchi
  • Patent number: 5364239
    Abstract: A terminal structure (9) for a motor-driven pump (1) to be disposed in a storage tank for a liquid such as liquefied ammonia or the like interconnects a motor-side terminal element (30) of a first conductor cable (29) for supplying an electric power to a motor (12) of the motor-driven pump and a power source-side terminal element (36) of a second conductor cable (35) for supplying the electric power from an electric power source. The terminal structure (9) has a hollow tubular housing (25) accommodating a conductor (41) and having upper and lower ends (37, 31) through which the power source-side and motor-side terminal elements (36, 30) extend into the housing and are electrically connected to the conductor (41) therein.
    Type: Grant
    Filed: August 16, 1993
    Date of Patent: November 15, 1994
    Assignee: Nikkiso Co., Ltd.
    Inventor: Kazuo Ishikura
  • Patent number: 5254011
    Abstract: A cable connecting and disconnecting apparatus for a submerged pump for connecting and disconnecting a liquid side power cable with an atmosphere side power cable, comprises a liquid side terminal header, an atmosphere side terminal header, and a liquid-tight intermediate container detachably secured between the headers. The intermediate container has therein a pair of partitions, and an insulating tube disposed within the intermediate container extends between the partitions and defines with the partitions an air-tight chamber within the intermediate container and outside the insulating tube and between the partitions. An atmosphere side terminal pin projects from the atmosphere side terminal header into the insulating tube, and a liquid side terminal pin projects from the liquid side terminal header. A pin guide surrounds the liquid side terminal pin, and liquid side terminal pin and atmosphere side terminal pin are in electrical contact with each other.
    Type: Grant
    Filed: March 30, 1992
    Date of Patent: October 19, 1993
    Assignee: Nikkiso Co., Ltd.
    Inventors: Kazuo Ishikura, Yuichiro Miura
  • Patent number: 5216505
    Abstract: A scanning line interpolation circuit for reproducing scanning lines not transmitted through interpolation on the basis of a main scanning line signal and an auxiliary signal both transmitted, wherein an interpolated scanning line signal is generated on the basis of the main scanning line signal and auxiliary signal with respect to a frequency band used to transmit the auxiliary signal and an interpolated scanning line is generated in response to picture motion on the basis of only the main scanning line signal with respect to a frequency band used not to transmit the auxiliary signal.
    Type: Grant
    Filed: August 13, 1990
    Date of Patent: June 1, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Kageyama, Norihiro Suzuki, Kazuo Ishikura, Makoto Ohnishi, Hiroshi Yoshigi, Takahiko Fukinuki
  • Patent number: 5181110
    Abstract: A video signal processing circuit capable of enlarging and displaying a picture and adapted for use in an apparatus in which a desired picture is selected, and a video signal representative of the desired picture under interlaced scanning is received, stored in a memory and processed to provide an enlarged video signal, includes a real signal/interpolated signal preparation circuit for preparing, from the stored video signal, new scanning lines for an image to be enlarged, and a memory processing circuit having switching control function to store an output signal of the real signal/interpolated signal preparation circuit in a memory, read the video signal out of the memory at a period different from a period at which the output signal is stored in the memory, and delay a read-out signal by one or more fields so that an enlarged signal is delivered.
    Type: Grant
    Filed: December 27, 1990
    Date of Patent: January 19, 1993
    Assignees: Hitachi, Ltd., Hitachi Video Engineering Inc.
    Inventors: Kenji Katsumata, Shigeru Hirahata, Masato Sugiyama, Takaaki Matono, Kazuo Ishikura, Sunao Suzuki, Kazuhiro Kaizaki
  • Patent number: 5029006
    Abstract: A video signal processing circuit capable of enlarging and displaying a picture and adapted for use in an apparatus in which a desired picture is selected, and a video signal representative of the desired picture under interlaced scanning is received, stored in a memory and processed to provide an enlarged video signal, comprises includes a real signal/interpolated signal preparation circuit for preparing, from the stored video signal, new scanning lines for an image to be enlarged, and a memory processing circuit having switching control function to store an output signal of the real signal/interpolated signal preparation circuit in a memory, read the video signal out of the memory at a period different from a period at which the output signal is stored in the memory, and delay a read-out signal by one or more fields so that an enlarged signal is delivered.
    Type: Grant
    Filed: April 25, 1989
    Date of Patent: July 2, 1991
    Assignees: Hitachi, Ltd., Hitachi Video Engineering, Inc.
    Inventors: Kenji Katsumata, Shigeru Hirahata, Masato Sugiyama, Takaaki Matono, Kazuo Ishikura, Sunao Suzuki, Kazuhiro Kaizaki
  • Patent number: 4889468
    Abstract: There is disclosed a submerged type pump which is vertically seated on the seating face arranged on the bottom of the fluid lifting column and is comprised of a motor section and a pump section with a casing in which the treating fluid may pass, wherein a check valve is arranged at a pump discharge port and an automatic switch valve is arranged on the top of the casing so that the automatic switch valve is released by closing the fluid lifting column with the pump seating face and the check valve to discharge the treating fluid suspended in the fluid lifting column.
    Type: Grant
    Filed: December 27, 1988
    Date of Patent: December 26, 1989
    Assignee: Nikkiso Co., Ltd.
    Inventor: Kazuo Ishikura
  • Patent number: 4853765
    Abstract: A video signal processing circuit capable of reproducing a still picture signal from a color video signal comprises a luminance signal/chrominance signal separation circuit of a motion adaptive type, a scanning line interpolation circuit of a motion adaptive type connected with the separation circuit, a first memory connected with the separation circuit to store therein the output of the separation circuit, a second memory connected with the interpolation circuit to store therein the output of the interpolation circuit and a switching circuit for delivering therethrough the outputs of said first and second memories as a first output signal alternately and for delivering therethrough the outputs of said second and first memories as a second output signal alternately, the alternation for the delivery by the switching circuit being effected at a frequency identical with the field frequency of the video signal.
    Type: Grant
    Filed: April 26, 1988
    Date of Patent: August 1, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Kenji Katsumata, Masato Sugiyama, Takaaki Matono, Shigeru Hirahata, Isao Nakagawa, Kazuo Ishikura, Sunao Suzuki
  • Patent number: 4821112
    Abstract: There is provided a detection circuit for TV receiver which includes a frame comb filter and a field comb filter and which generates a luminance signal or a chrominance signal by effecting addition or subtraction upon video signals of two frames adjoining each other included in the received TV signal. This detection circuit includes a synchronization separation circuit, an APC circuit, a frequency division circuit connected to the APC circuit, and a comparator circuit connected to the frequency division circuit. The frequency of the chrominance subcarrier signal is demultiplied by the frequency division circuit. The phase of the chrominance subcarrier signal thus frequency-divided is compared with the phase of the synchronizing signal separated by the synchronizing separation circuit. It is thus judged whether the received TV signal is a standard TV signal or a nonstandard TV signal.
    Type: Grant
    Filed: June 18, 1987
    Date of Patent: April 11, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Toshiyuki Sakamoto, Ikuya Arai, Toshiyuki Kurita, Toshinori Murata, Isao Nakagawa, Masahiko Achiha, Kazuo Ishikura
  • Patent number: 4811092
    Abstract: A movement detector necessary for processing composite color television signals, which detects movement in image signals, wherein the detecting circuit is so constructed that no deficient motion is produced. A difference signal between the present frame and that preceding by two frames of the television signals is converted into a motion information signal and a movement detection signal is made by integrating the signal obtained by the conversion with respect to temporal axis.
    Type: Grant
    Filed: August 14, 1987
    Date of Patent: March 7, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Masahiko Achiha, Kazuo Ishikura, Shobu Saito, Masato Sugiyama, Kenji Katsumata
  • Patent number: 4794454
    Abstract: A movement detection circuit for detecting movement information of a luminance signal and movement information of a chrominance signal of a television signal comprises a first movement detection circuit for detecting the movement information of the luminance signal and a second movement detection circuit for detecting the movement information of the chrominance signal. The first movement detection circuit detects the movement information of the luminance signal based on two signals spaced by one frame period, and the second movement detection circuit detects the movement information of the chrominance signal based on two signals spaced by two frames periods.
    Type: Grant
    Filed: October 6, 1987
    Date of Patent: December 27, 1988
    Assignees: Hitachi, Ltd., Hitachi Video Engineering, Inc.
    Inventors: Masato Sugiyama, Kenji Katsumata, Shigeru Hirahata, Isao Nakagawa, Sunao Suzuki, Masahiko Achiha, Kazuo Ishikura
  • Patent number: 4739390
    Abstract: A television signal processing circuit which separates a television signal into a luminance signal and a chrominance signal or interpolates the scanning lines of the television signal by using a video memory such as a frame memory or a field memory. The circuit determines whether the television signal to be treated is a standard television signal or a non-standard television signal. Depending upon this determination, the signal processing circuit changes its operation mode so that it operates properly even in case the television signal is different from the standard television signal and contains jitter in the time axis like the signal from a VTR. When the television signal is a non-standard television signal, the processing circuit without the video memory operates.
    Type: Grant
    Filed: August 12, 1986
    Date of Patent: April 19, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Masahiko Achiha, Isao Nakagawa, Kazuo Ishikura, Shobu Saito
  • Patent number: 4636857
    Abstract: A scanning line interpolation circuit for interpolating scanning lines of an interlaced television signal to thereby obtain a television signal having the doubled number of scanning lines, in which, in order to improve the quality of the reproduced television picture, the interpolation circuit is constituted by a spatio-temporal filter and a time compression circuit, and in the domain of the spatial vertical frequency and the time frequency, the total frequency characteristic of the spatio-temporal filter and the time compression circuit is set such that the response characteristic becomes zero at the vertical frequency and the time frequency of the scanning frequency of the interlaced television signal.
    Type: Grant
    Filed: January 8, 1985
    Date of Patent: January 13, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Masahiko Achiha, Kazuo Ishikura
  • Patent number: 4530004
    Abstract: A color television signal processing circuit receives an input signal of a composite color television signal in the form of superimposition of a chrominance carrier signal on a luminance signal, separates the chrominance carrier signal and the luminance signal, and doubles the number of scanning lines of the chrominance signal or the luminance signal as compared to the number of scanning lines of the composite color television signal. A separation circuit separates the chrominance carrier signal and the luminance signal on the basis of a difference signal of the composite color television signal between adjacent frames or adjacent fields. A scanning line interpolation circuit doubles the number of scanning lines of at least the luminance signal delivered out of the separation circuit on the basis of an interpolation scanning signal derived from a signal indicative of scanning lines for the adjacent preceding field.
    Type: Grant
    Filed: December 29, 1982
    Date of Patent: July 16, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Masahiko Achiha, Kazuo Ishikura