Patents by Inventor Kazuo Ishimoto
Kazuo Ishimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220173471Abstract: In a support member, m×n (n is an integer equal to or larger than 4) cylindrical storage battery cells are arranged in a trefoil formation structure comprised of m (m is an integer equal to or larger than 4) tiers along a first direction. Along a second direction in the support member, n storage battery cells are arranged in a first tier, n+1 storage battery cells are arranged in a second tier, n storage battery cells are arranged in an m?1th tier, and n?1 storage battery cells are arranged in a m-th tier. The n storage battery cells in the first tier are arranged inward of the n+1 storage battery cells in the second tier in the second direction, and the n?1 storage battery cells in the m-th tier are arranged inward of the n storage battery cells in the m-lth tier in the second direction.Type: ApplicationFiled: March 11, 2020Publication date: June 2, 2022Inventors: Shoichi Toya, Kazuo ISHIMOTO, Taiki MUKAI
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Publication number: 20160285271Abstract: A plurality of power conversion apparatuses individually outputs AC power based on power input from a plurality of power sources. A plurality of switches to output power to an independent output path is inserted into each of AC output paths of the plurality of power conversion apparatuses. A plurality of drive signal lines to transmit a drive signal from the plurality of power conversion apparatuses to the plurality of switches is provided. The plurality of drive signal lines has a coupling point. At a time of switching of the switch in order to release interconnection with the grid and to switch to an independent output, the power conversion apparatus determines itself to be a master device when a level of the drive signal line is inverted after switching of the switch and determines itself to be a slave device when the level is not inverted.Type: ApplicationFiled: March 10, 2016Publication date: September 29, 2016Inventor: Kazuo ISHIMOTO
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Patent number: 9397493Abstract: In the present invention, a main switch circuit (13) is provided between an electric power line (PL), to which voltage outputted from a solar cell (11) is applied, and a battery module (12). A protection circuit (19) turns OFF the main switch circuit (13) to protect the battery module (12) from overcharging when the voltage (VBAT) of the battery module (12) is equal to or greater than an upper limit voltage. The voltage outputted from the solar cell (11) is set so as to be greater than the upper limit voltage to allow the battery module (12) to be charged to the upper limit voltage. When a charge ON command signal has been received, a control unit (18) turns ON only a sub-switch circuit (14) to introduce current from the solar cell (11) into a parallel circuit (15) and to suppress the voltage (VPL) of the power line (PL) to less than the upper limit voltage before turning ON the main switch circuit (13).Type: GrantFiled: July 26, 2013Date of Patent: July 19, 2016Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Tomomichi Nakai, Takeshi Nakashima, Kazuo Ishimoto, Hiroshi Saeki
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Patent number: 8797042Abstract: A ground fault detection circuit includes: a first switch circuit that connects/disconnects a first path between a positive bus bar and a ground potential section, the positive bus bar being connected to positive electrodes of secondary battery units through a field-effect transistor including a parasitic diode; a second switch circuit that connects/disconnects a second path between a negative bus bar and a ground potential section, the negative bus bar being connected to negative electrodes of the secondary battery units; and a ground fault detection unit that detects a ground fault of the positive bus bar or the negative bus bar based on an electric current flowing through the first path or the second path.Type: GrantFiled: March 22, 2012Date of Patent: August 5, 2014Assignee: Sanyo Electric Co., Ltd.Inventors: Takehito Ike, Takayoshi Abe, Tomomichi Nakai, Takeshi Nakashima, Kazuo Ishimoto
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Publication number: 20140145727Abstract: A ground fault detection circuit may include a switch circuit that connects or disconnects a path between a bus bar connected to a secondary battery and a ground potential section; an I/V conversion resistance element for detecting a ground fault of the bus bar based on an electric current flowing through the path; and a resistance element connected in series to the I/V conversion resistance element.Type: ApplicationFiled: January 30, 2014Publication date: May 29, 2014Applicant: SANYO Electric Co., Ltd.Inventors: Takehito IKE, Takayoshi ABE, Tomomichi NAKAI, Takeshi NAKASHIMA, Kazuo ISHIMOTO
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Publication number: 20130314829Abstract: In the present invention, a main switch circuit (13) is provided between an electric power line (PL), to which voltage outputted from a solar cell (11) is applied, and a battery module (12). A protection circuit (19) turns OFF the main switch circuit (13) to protect the battery module (12) from overcharging when the voltage (VBAT) of the battery module (12) is equal to or greater than an upper limit voltage. The voltage outputted from the solar cell (11) is set so as to be greater than the upper limit voltage to allow the battery module (12) to be charged to the upper limit voltage. When a charge ON command signal has been received, a control unit (18) turns ON only a sub-switch circuit (14) to introduce current from the solar cell (11) into a parallel circuit (15) and to suppress the voltage (VPL) of the power line (PL) to less than the upper limit voltage before turning ON the main switch circuit (13).Type: ApplicationFiled: July 26, 2013Publication date: November 28, 2013Applicant: Sanyo Electric Co., Ltd.Inventors: Tomomichi Nakai, Takeshi Nakashima, Kazuo Ishimoto, Hiroshi Saeki
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Publication number: 20120182024Abstract: A ground fault detection circuit includes: a first switch circuit that connects/disconnects a first path between a positive bus bar and a ground potential section, the positive bus bar being connected to positive electrodes of secondary battery units through a field-effect transistor including a parasitic diode; a second switch circuit that connects/disconnects a second path between a negative bus bar and a ground potential section, the negative bus bar being connected to negative electrodes of the secondary battery units; and a ground fault detection unit that detects a ground fault of the positive bus bar or the negative bus bar based on an electric current flowing through the first path or the second path.Type: ApplicationFiled: March 22, 2012Publication date: July 19, 2012Applicant: SANYO Electric Co., Ltd.Inventors: Takehito IKE, Takayoshi ABE, Tomomichi NAKAI, Takeshi NAKASHIMA, Kazuo ISHIMOTO
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Publication number: 20120077172Abstract: A digital camera (1) performs shooting such that each student within a classroom is included in a subject, uses an optical flow to detect the action of standing up from a chair or the action of moving a mouth by a student who needs to be a speaker, thus specifies the position of the speaker (any of the students) on a shooting image and extracts image data on the face portion of the speaker. A PC (2) uses a projector (3) to display a material on a screen (4), and superimposes and displays, when the extracted image data is transferred from the digital camera (1), a picture of the face of the speaker on the screen (4) based on the extracted image data.Type: ApplicationFiled: December 2, 2011Publication date: March 29, 2012Applicant: SANYO ELECTRIC CO., LTD.Inventors: Tohru WATANABE, Ryuhei AMANO, Noboru YOSHINOBE, Masafumi TANAKA, Kiyoko TSUJI, Kazuo ISHIMOTO, Toshio NAKAKUKI, Kaihei KUWATA, Masahiro YOSHIDA
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Publication number: 20120044140Abstract: An information display system includes a pointing device and a control apparatus for detecting the locus of tip of the pointing device. The pointing device includes a light emitting part for irradiating the radiated light that radiates with the tip of the pointing device as the center on a predetermined plane. A camera captures images of a region including the radiated light on the predetermined plane. A radiated light detector detects the radiated light from the images captured by the camera. An estimation unit estimates the position of the tip of the pointing device from the radiated light detected by the radiated light detector.Type: ApplicationFiled: August 17, 2011Publication date: February 23, 2012Applicant: SANYO Electric Co., Ltd.Inventors: Tadahisa KOYAMA, Kazuo Ishimoto, Toru Watanabe, Miwa Yoneda
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Publication number: 20110310014Abstract: In an image pickup apparatus, a visible light cut filter allows infrared components to pass through, and blocks visible light components. A plurality of image pickup devices receive the light transmitted through the visible light cut filter such that a plurality of color components are received separately from each other. The visible light cut filter allows part of the visible light components to transmit such that the visible light component enters at least one of the plurality of image pickup devices.Type: ApplicationFiled: June 21, 2011Publication date: December 22, 2011Applicant: SANYO Electric Co., Ltd.Inventors: Fuminori MIZUNO, Kazuo Ishimoto, Toru Watanabe
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Publication number: 20110157153Abstract: A projection unit projects a predetermined image onto a projection plane through a lens. An image generating unit generates the predetermined image which is to be projected from the projection unit. A code generator generates a notifying image that contains information to be conveyed to another projector provided with an image pickup function. The projection unit projects the notifying image generated by the code generator and has the another projector capture the notifying image so as to convey the information to the another projector.Type: ApplicationFiled: December 22, 2010Publication date: June 30, 2011Inventors: Kazuo ISHIMOTO, Naoyuki Nimura, Tatsuya Takahashi
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Patent number: 6882370Abstract: A solid-state image pickup apparatus is provided having a solid-state image pickup device for generating an information charge in response to an image of which light was received, a drive circuit for transferring the information charge accumulated in the solid-state image pickup device, and outputting the information charge, a power supply for generating a predetermined voltage in accordance with an input amount of voltage booster pulses and supplying the predetermined voltage to the solid-state image pickup device and the drive circuit and a pulse generator circuit for generating and supplying the voltage booster pulses to the power supply.Type: GrantFiled: January 8, 2002Date of Patent: April 19, 2005Assignee: Sanyo Electric Co., Ltd.Inventor: Kazuo Ishimoto
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Patent number: 6618085Abstract: Image information can be supplied from an image pickup apparatus to computer equipment at high speed. A solid state image pickup device 1 is vertically driven by a vertical drive circuit 2v and horizontally driven by a horizontal drive circuit 2h. The vertical drive circuit 2v operates at a given cycle in response to a vertical timing signal VT from a vertical timing control circuit 21v which operates according to a frequency dividing clock DCK with a given cycle. The horizontal drive circuit 2h operates in response to a horizontal timing signal HT from a horizontal timing control circuit 21h to be driven in response to a transfer trigger TR which is supplied from the computer equipment. An exposure control circuit 23 responds to a horizontal transfer flag HF which is supplied from the horizontal timing control circuit 21h and determines timing for discharge driving excluding a period of the horizontal transfer drive.Type: GrantFiled: November 25, 1997Date of Patent: September 9, 2003Assignee: Sanyo Electric Co., Ltd.Inventor: Kazuo Ishimoto
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Publication number: 20030122947Abstract: Image information can be supplied from an image pickup apparatus to computer equipment at high speed. A solid state image pickup device 1 is vertically driven by a vertical drive circuit 2v and horizontally driven by a horizontal drive circuit 2h. The vertical drive circuit 2v operates at a given cycle in response to a vertical timing signal VT from a vertical timing control circuit 21v which operates according to a frequency dividing clock DCK with a given cycle. The horizontal drive circuit 2h operates in response to a horizontal timing signal HT from a horizontal timing control circuit 21h to be driven in response to a transfer trigger TR which is supplied from the computer equipment. An exposure control circuit 23 responds to a horizontal transfer flag HF which is supplied from the horizontal timing control circuit 21h and determines timing for discharge driving excluding a period of the horizontal transfer drive.Type: ApplicationFiled: November 25, 1997Publication date: July 3, 2003Inventor: KAZUO ISHIMOTO
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Publication number: 20020089594Abstract: The power consumption of an image pickup apparatus using a solid-state image pickup device is reduced. At the termination of a readout period of an information charge from a CCD image sensor (2), a timing generator (8) stops voltage booster pulses for boosting the output voltage of a power supply (6). As a result, a driver (4) stops operation and the power consumption required to drive the CCD image sensor (2) basically stops. Thereafter, as the electronic shutter operation approaches, the timing generator (8) resumes the generation of the voltage booster pulses and the voltage of the power supply (6) is boosted. On the basis of the exposure condition of the previous field, a DSP (16) obtains the timing for the electronic shutter for the next field, and further the timing that has been advanced only for the period required for voltage boosting set in a register, and starts the voltage boosting operation from this advanced timing.Type: ApplicationFiled: January 8, 2002Publication date: July 11, 2002Applicant: SANYO ELECTRIC CO., LTD.Inventor: Kazuo Ishimoto
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Publication number: 20020089598Abstract: To improve the dynamic range of an output signal from a CCD image sensor, an exposure time, beginning with the completion of an electronic shutter operation started in response to an STTRG pulse (22) and lasting until the beginning of a frame shift operation, is divided into two parts according to a WTTRG pulse 26. Information charges accumulated in an odd line during a preceding first exposure time A are vertically transferred to an adjacent even line at a timing defined by the WTTRG pulse 26, and the information charges for both lines are compounded there. Another exposure is applied to the odd and even lines during a second exposure time B, and information charges generated in the odd and even lines are vertically transferred into a horizontal CCD shift register for compounding. The thus-compounded charges are output from a CCD image sensor through horizontal transfer.Type: ApplicationFiled: January 4, 2002Publication date: July 11, 2002Applicant: SANYO ELECTRIC CO., LTD.Inventors: Kazuo Ishimoto, Tohru Watanabe
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Patent number: 6281991Abstract: An illumination light-emitting member is made up of an LED group obtained by connecting a plurality of LEDs in series with each other, and illuminates the surface to be sensed including an image. A solid-state image sensing element receives light reflected by the surface to be sensed illuminated by the illumination light-emitting member, and outputs a corresponding sensed image signal. A drive circuit controls driving of the solid-state image sensing element to sense the image. A booster circuit serves as a power supply circuit for the LED group, and generates a high voltage by adding a predetermined power supply voltage in the apparatus, and a frequency-divided pulse obtained by frequency-dividing a predetermined pulse output from the drive circuit.Type: GrantFiled: September 8, 1998Date of Patent: August 28, 2001Assignees: Olympus Optical Co., Ltd., Sanyo Electric Co., Ltd.Inventors: Takeshi Mori, Kazuo Ishimoto, Tohru Watanabe
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Patent number: 6134375Abstract: A first digital processor (13) generates luminance data Y and color difference data U, V, using image data D1. The processor (13) further generates separated luminance data Y1, Y2 by halving the luminance data Y, and generates a compound color difference data C by combining the color difference data U, V for output. An JPEG encoder 13 compresses the separated luminance data Y1, Y2 and the compound color difference data C to generate compressed luminance data y1, y2 and compressed color difference data c. A modulator 15 modulates the compressed luminance data y1, y2 and the compressed color difference data c to generate luminance modulated signals m1, m2 and color difference modulated signal mc. A recording/reproducing section 16 records the luminance modulated signals m1, m2 and the color difference modulated signal mc in parallel onto the first to third recording tracks of a magnetic tape (20).Type: GrantFiled: February 27, 1998Date of Patent: October 17, 2000Assignee: Sanyo Electric Co., Ltd.Inventors: Kazuo Naganawa, Kazuo Ishimoto, Toshihiro Furusawa, Yoshihito Higashitsutsumi
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Patent number: 3960198Abstract: An improved method of producing a mould under a reduced pressure is described herein. In the improved method, after a main pattern (1) having a protrusion and a recess is inserted with an auxiliary pattern (8) having the same shape as said recess and having an air-tight film (9) tightly adhered on its outer peripheral surface into said recess, said main pattern (1) is fixedly placed on a surface plate (2) provided with evacuating means, and the surface of the main pattern (1) including the upper surface of said surface plate but excluding the upper surface of said auxiliary pattern (8) is covered with an air-tight film (3). Then, after said air-tight film (3) has been tightly adhered onto the surface of the main pattern (1) excluding the upper surface of said auxiliary pattern (8) and onto the upper surface of the surface plate (2) with the evacuating means of the surface plate (2), said auxiliay pattern (8) is extracted from the main pattern (1).Type: GrantFiled: April 25, 1975Date of Patent: June 1, 1976Assignee: Mitsubishi Jukogyo Kabushiki KaishaInventors: Hiroshi Matsuura, Kazuo Ishimoto, Takashi Yasukuni