Patents by Inventor Kazuo Miyatsuji

Kazuo Miyatsuji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7439621
    Abstract: The RF device of the present invention includes: a semiconductor substrate; and first and second semiconductor components provided on the substrate. Each of the components includes source electrodes, a gate electrode and a drain electrode. And multiple through holes, which pass through the substrate in the thickness direction, are opened in a region of the substrate between the two components. To enhance the effect of suppressing electrical interference between the components, a gap between two adjacent ones of the through holes is preferably smaller than the thickness of the substrate.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: October 21, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hidetoshi Ishida, Kazuo Miyatsuji, Hidetoshi Furukawa, Tsuyoshi Tanaka, Daisuke Ueda
  • Patent number: 6166429
    Abstract: A semiconductor device has the following structure: a lead frame 2 is disposed on the center of a package 1, signal terminal electrodes 3 through 7 are disposed on edges of the package, a semiconductor chip 8 is mounted on the lead frame 2, a grounding electrode 16 having a grounding potential is disposed between the signal terminal electrodes 4 and 5, and a grounding electrode having a grounding potential is disposed between the signal terminal electrodes 5 and 6. This structure increases an electrical separation between the signal terminal electrodes.
    Type: Grant
    Filed: March 3, 1998
    Date of Patent: December 26, 2000
    Assignee: Matsushita Electronics Corporation
    Inventors: Hidetoshi Ishida, Kazuo Miyatsuji, Daisuke Ueda
  • Patent number: 5903178
    Abstract: A drain and a source of a field-effect transistor are connected to first and second signal terminals, respectively. A first control terminal is connected to a gate. A first resistor is interposed between the gate and the first control terminal. Capacitors are interposed between the source/drain and the first and second signal terminals, respectively. A control terminal is connected to at least one of the source/drain via a second resistor. High frequency signals supplied through the first signal terminal is sent through the field-effect transistor and outputted through the second signal terminal, and a quantity of the transmitted high frequency signals is controlled by a control voltage signal applied across the first and second control terminals. This structure provides a high frequency semiconductor integrated circuits which reduces a power consumption and an occupied area, increases a switchable power, suppresses output distortion, and simplifies a peripheral circuit.
    Type: Grant
    Filed: October 9, 1997
    Date of Patent: May 11, 1999
    Assignee: Matsushita Electronics Corporation
    Inventors: Kazuo Miyatsuji, Daisuke Ueda