Patents by Inventor Kazuo Nagatani

Kazuo Nagatani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8489037
    Abstract: A power amplifying apparatus has a bandwidth limitation process circuit to which an envelope signal included in a transmission signal is inputted, and which performs a bandwidth limitation process on the envelope signal, a variable power supply circuit for generating a power amplifier supply voltage based on a voltage control signal generated by the bandwidth limitation process circuit, and a power amplifier which is fed an input signal, and which is driven in accordance with the supply voltage from the variable power supply circuit.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: July 16, 2013
    Assignee: Fujitsu Limited
    Inventors: Nobukazu Fudaba, Hiroyoshi Ishikawa, Hajime Hamada, Yuichi Utsunomiya, Kazuo Nagatani
  • Patent number: 8452250
    Abstract: A DC offset component that occurs in a quadrature modulation system, and that is contained in a modulated transmit signal, is compensated for with good accuracy. In a DC offset compensation method according to the present invention, a DC offset correction value obtained from the transmit signal is weighted in accordance with the signal level of an input signal which is transmit data input to the quadrature modulation system, and the DC offset component contained in the transmit signal is compensated for by using the thus weighted DC offset correction value.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: May 28, 2013
    Assignee: Fujitsu Limited
    Inventors: Hiroyoshi Ishikawa, Nobukazu Fudaba, Kazuo Nagatani, Hajime Hamada, Tokuro Kubo
  • Patent number: 8451055
    Abstract: An apparatus includes: a unit that stores the look-up table including distortion compensation coefficients; a unit that selects addresses according to an input signal, acquires coefficients stored at the selected addresses, and performs the predistortion of the input signal by using the acquired coefficients; a unit that calculates an error signal by comparing with the input signal a feedback signal that indicates an output of a power amplifier to which a result of the predistortion is inputted; a unit that calculates coefficients from the error signal and the acquired coefficients by using the adaptive algorithm; a unit that, for each of the selected addresses, selects coefficients as adequate coefficients from among the calculated coefficients according to the error signal; and a unit that, for each of the selected addresses, calculates an average value of the adequate coefficients and replaces a stored coefficient in the look-up table with the average value.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: May 28, 2013
    Assignee: Fujitsu Limited
    Inventors: Nobukazu Fudaba, Hiroyoshi Ishikawa, Hajime Hamada, Yuichi Utsunomiya, Kazuo Nagatani
  • Patent number: 8442157
    Abstract: A wireless apparatus includes: an A/D converter which samples an in-phase signal component and a quadrature signal component from a quadrature-modulated signal of analog form alternately; a digital quadrature demodulation unit which applies digital quadrature demodulation to an output signal of the A/D converter and outputs an in-phase signal and a quadrature signal; and an error detection unit which, based on the in-phase and quadrature signals output from the digital quadrature demodulation unit, detects a time difference error between the sample timing of the in-phase signal component and the sample timing of the quadrature signal component.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: May 14, 2013
    Assignee: Fujitsu Limited
    Inventors: Hiroyoshi Ishikawa, Kazuo Nagatani, Hajime Hamada, Nobukazu Fudaba, Yuichi Utsunomiya, Takeshi Ohba, Hideharu Shako, Yasuhito Funyu
  • Patent number: 8433262
    Abstract: A disclosed transmission device includes a voltage control signal generating unit configured to generate a first voltage control signal from a transmission signal, an amplifier configured to amplify the transmission signal in response to the first voltage control signal, a first timing adjusting unit configured to adjust a control timing for the first voltage control signal, and a control timing setting unit configured to set the control timing adjusted by the first timing adjusting unit based on the output signal from the amplifier and the transmission signal.
    Type: Grant
    Filed: August 5, 2010
    Date of Patent: April 30, 2013
    Assignee: Fujitsu Limited
    Inventors: Yuichi Utsunomiya, Nobukazu Fudaba, Hiroyoshi Ishikawa, Hajime Hamada, Kazuo Nagatani
  • Publication number: 20130040587
    Abstract: A distortion compensation device includes: a frequency-characteristic adding unit configured to add a frequency characteristic to an error signal to generate an added error signal, the error signal being a difference between an input signal input to an amplifier and an output signal output from the amplifier; a distortion-compensation-coefficient updating unit configured to update a distortion compensation coefficient for compensating for a distortion characteristic of the amplifier based on the added error signal; and a distortion compensation unit configured to perform distortion compensation on the input signal using the updated distortion compensation coefficient.
    Type: Application
    Filed: July 26, 2012
    Publication date: February 14, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Hiroyoshi Ishikawa, Kazuo Nagatani, Nobukazu Fudaba, Yuichi Utsunomiya
  • Publication number: 20130015917
    Abstract: A distortion compensation apparatus includes an amplifying unit, a plurality of distortion compensation coefficient storage units, a first address generating unit, a second address generating unit, and a distortion compensating unit. The amplifying unit amplifies an input signal. A plurality of distortion compensation coefficient storage units store the distortion compensation coefficients for compensating for the distortion of the amplifying unit by being associated with two different addresses. The first address generating unit generates a first address based on the current input signal. The second address generating unit generates a second address different from the first address based on the previous input signal.
    Type: Application
    Filed: July 5, 2012
    Publication date: January 17, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Hiroyoshi ISHIKAWA, Kazuo Nagatani, Nobukazu Fudaba
  • Publication number: 20120288030
    Abstract: A distortion compensation device which reduces a distortion of an amplifier which is added to an output signal of the amplifier, the distortion compensation device including: a plurality of distortion compensation coefficient storage circuits which stores a plurality of distortion compensation coefficients and outputs the distortion compensation coefficients according to an amplitude of an input signal of the amplifier, a distortion compensating processing circuit which adds the distortion compensation coefficient output from each of the plurality of distortion compensation coefficient storage circuits to the input signal of the amplifier, and a distortion compensation coefficient updating circuit which performs weighting processing on the distortion compensation coefficient output from each of the plurality of distortion compensation coefficient storage circuits to reduce the distortion compensation coefficient and which calculates an update value of the distortion compensation coefficient by using the disto
    Type: Application
    Filed: May 2, 2012
    Publication date: November 15, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Kazuo Nagatani, Hiroyoshi Ishikawa, Nobukazu Fudaba, Yuichi Utsunomiya
  • Publication number: 20120275545
    Abstract: A distortion compensation apparatus for performing distortion compensation processing by applying the inverse properties of distortion properties of said power amplifier to a transmission signal to be input to a power amplifier, includes a plurality of distortion compensation coefficient storage units configured to store a plurality of distortion compensation coefficients used for said distortion compensation processing, an offset correction processing unit configured to subject said distortion compensation coefficient stored in each of said plurality of distortion compensation coefficient storage units to offset correction processing, and to generate distortion compensation coefficients in the case that said offset correction processing has not been performed, corresponding to said plurality of distortion compensation coefficient storage units, in a pseudo manner and a distortion compensation processing unit configured to subject said transmission signal to said distortion compensation processing based on sa
    Type: Application
    Filed: March 15, 2012
    Publication date: November 1, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Yuichi Utsunomiya, Hiroyoshi Ishikawa, Nobukazu Fudaba, Kazuo Nagatani
  • Publication number: 20120257670
    Abstract: A transmission circuit comprises a ??? modulator to perform ??? modulation of an amplitude modulation component of a modulation signal and to output a pulse width modulation signal, an angle modulator to generate an angle modulation component signal of a signal obtained by multiplying the modulation signal by a transmission output control coefficient corresponding to a transmission output in a power amplifier, and a multiplier to multiply the pulse width modulation signal by the angle modulation component signal and to output a result of the multiplication as an output signal to the power amplifier.
    Type: Application
    Filed: June 21, 2012
    Publication date: October 11, 2012
    Applicants: THE UNIVERSITY OF ELECTRO-COMMUNICATIONS, FUJITSU LIMITED
    Inventors: Kazuo NAGATANI, Eisuke FUKUDA, Yasushi YAMAO
  • Patent number: 8270530
    Abstract: A distortion compensating apparatus includes a processing circuit that calculates each of a plurality of series operation coefficient pairs based on a transmission signal and a feedback signal of an output from an amplifying circuit performing power amplification of the transmission signal, executes a series operation process with respect to the transmission signal based on the plurality of the series operation coefficient pairs as a distortion compensation of the transmission signal, and inputs a result of the series operation process to the amplifying circuit performing the power amplification, and a selecting unit that, on the basis of power of the transmission signal, selects the series operation process to be executed corresponding to one of the plurality of series operation coefficient pairs, or selects one of the plurality of series operation coefficient pairs to be used in the series operation process to be executed.
    Type: Grant
    Filed: September 8, 2009
    Date of Patent: September 18, 2012
    Assignee: Fujitsu Limited
    Inventors: Hajime Hamada, Hiroyoshi Ishikawa, Yuichi Utsunomiya, Kazuo Nagatani, Nobukazu Fudaba, Hideharu Shako
  • Publication number: 20120229209
    Abstract: A power amplifier amplifies a signal. An error signal calculating unit calculates an error signal in accordance with an input signal and an output from the power amplifier. A distortion compensation unit performs predistortion on the input signal by using distortion compensation coefficients that are generated in accordance with a plurality of delay signals obtained by giving different amounts of delay to the input signal and by using an error signal and outputs the input signal subjected to the predistortion to the signal amplifying unit. A tap interval control unit controls the delay intervals of the delay signals that are used for the predistortion performed by the distortion compensation unit in accordance with signal correlation information calculated from the input signal.
    Type: Application
    Filed: February 27, 2012
    Publication date: September 13, 2012
    Applicant: FUJITSU LIMITED
    Inventors: NOBUKAZU FUDABA, HIROYOSHI ISHIKAWA, YUICHI UTSUNOMIYA, KAZUO NAGATANI
  • Publication number: 20120224654
    Abstract: A transmitter, when the power changes at a certain timing, adjusts the gain for the transmission signal before the application of the distortion compensation process correspondingly to the amplitude of the transmission signal at the certain timing based on the average of the power of a transmission signal before application of the distortion compensation process, obtains a distortion compensation coefficient corresponding to the value of the power of the adjusted transmission signal from the LUT, applies the distortion compensation process to the transmission signal using the obtained distortion compensation coefficient, calculates an update for a distortion compensation coefficient corresponding to the obtained distortion compensation coefficient and stored in the LUT based on an error between the power of the transmission signal amplified by an amplifier and the power of the transmission signal before the application of the distortion compensation process, and updates the LUT using the calculated update.
    Type: Application
    Filed: January 24, 2012
    Publication date: September 6, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Kazuo NAGATANI, Hiroyoshi ISHIKAWA, Nobukazu FUDABA, Yuichi UTSUNOMIYA, Toshio KAWASAKI
  • Patent number: 8254857
    Abstract: A radio communication device includes a power amplifier to amplify a transmit signal, a control unit to generate a voltage control signal for defining power to be supplied to the power amplifier in accordance with a conversion curve expressed using a polynomial series based on an envelope signal obtained from the transmit signal and determine the polynomial series based on an efficiency of the power amplifier, and a power source unit to supply the power to the power amplifier based on the voltage control signal, wherein the control unit divides an amplitude range of the envelope signal on the conversion curve into a plurality of sections and determines the polynomial series based on at least one of the plurality of sections.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: August 28, 2012
    Assignee: Fujitsu Limited
    Inventors: Nobukazu Fudaba, Hiroyoshi Ishikawa, Hajime Hamada, Yuichi Utsunomiya, Kazuo Nagatani
  • Publication number: 20120202440
    Abstract: A distortion compensation device includes a distortion compensator that predistorts an input signal based on delay signals and distortion compensation coefficients corresponding to the respective delay signals obtained by applying different amounts of delay to the input signal, a calculator that calculates an error signal based on the predistorted input signal and an output signal from an amplifier that amplifies the predistorted input signal, a calculator that calculates prospective distortion compensation coefficients for updating the distortion compensation coefficients, based on the error signal, a saturation processor that performs saturation processing for bringing, when the prospective distortion compensation coefficients do not fall into a preset range, the prospective distortion compensation coefficients into the preset range, and a controller that controls the updating of the distortion compensation coefficients based on pieces of coefficient saturation information indicating whether the saturation
    Type: Application
    Filed: February 7, 2012
    Publication date: August 9, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Nobukazu FUDABA, Hiroyoshi ISHIKAWA, Yuichi UTSUNOMIYA, Kazuo NAGATANI
  • Publication number: 20120098596
    Abstract: A power amplifier apparatus that includes a processor that performs a first distortion compensation processing on an input signal using a distortion compensation coefficient to obtain a first signal and an amplifier that amplifies the first signal. The processor performs a second distortion compensation processing the amplified signal using the distortion compensation coefficient to obtain a second signal and updates the distortion compensation coefficient to enable convergence between the first signal and the second signal.
    Type: Application
    Filed: October 20, 2011
    Publication date: April 26, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Kazuo NAGATANI, Yuichi Utsunomiya, Nobukazu Fudaba, Hiroyoshi Ishikawa, Hajime Hamada
  • Patent number: 8154341
    Abstract: A power amplifying apparatus includes a high-speed low pass filter which inputs an envelope signal included in a transmission signal therein, a low-speed low pass filter which inputs the envelope signal therein, a determination unit which inputs the envelope signal therein and determines rising or falling of the envelope signal, a selecting unit which selects one of the high-speed low pass filter and the low-speed low pass filter according to a determined result of the determination unit, and a voltage supply unit which generates a voltage based on a signal input according to a selection by the selecting unit and supplies the voltage to a power amplifier which inputs the transmission signal therein so as to amplify a power of the transmission signal.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: April 10, 2012
    Assignee: Fujitsu Limited
    Inventors: Hiroyoshi Ishikawa, Nobukazu Fudaba, Hajime Hamada, Yuichi Utsunomiya, Kazuo Nagatani, Toru Maniwa
  • Publication number: 20120068768
    Abstract: A transmission apparatus includes an analog digital converter that performs sampling on a demodulated signal obtained by demodulating a part of an output signal, which is produced by amplifying a modulated signal of a baseband signal including a plurality of signals having frequencies separated from each other, at a sampling frequency lower than a frequency of a given intermodulation distortion component and converting the demodulated signal into a digital signal, a detection section that detects an aliasing component of the given intermodulation distortion component produced by the conversion of the analog digital converter, and a distortion compensation section that compensates an input signal to be modulated for the given intermodulation distortion component in accordance with the detected aliasing component.
    Type: Application
    Filed: September 16, 2011
    Publication date: March 22, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Hiroyoshi Ishikawa, Nobukazu Fudaba, Kazuo Nagatani, Yasuyuki Oishi
  • Patent number: 8130866
    Abstract: A peak suppressing apparatus includes an amplitude limiter that limits amplitude of the transmission signal with a predetermined threshold; a peak-suppressing-signal extracting unit that extracts a peak suppressing signal by subtracting the transmission signal before the amplitude limiting from the transmission signal amplitude-limited by the amplitude limiter; a filtering unit that performs filtering so that a frequency characteristic of the peak suppressing signal extracted by the peak-suppressing-signal extracting unit becomes flat; and an adder that adds the peak suppressing signal filtered by the filtering unit to the transmission signal.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: March 6, 2012
    Assignee: Fujitsu Limited
    Inventors: Kazuo Nagatani, Hajime Hamada, Hiroyoshi Ishikawa, Nobukazu Fudaba, Yuichi Utsunomiya
  • Patent number: 8102941
    Abstract: A peak suppression threshold value control unit receives an input of quality requirement information, such as a modulation system and coding ratio, from a baseband signal generation unit, determines a threshold value of a peak suppression unit based on the quality requirement information and outputs the threshold value to a peak suppression unit. The peak suppression unit applies a peak suppression control to a baseband signal input from a baseband signal generation unit based on the threshold value and outputs a signal (i.e., a peak suppression signal) applied by the peak suppression process.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: January 24, 2012
    Assignee: Fujitsu Limited
    Inventors: Hajime Hamada, Tokuro Kubo, Kazuo Nagatani, Hiroyoshi Ishikawa, Nobukazu Fudaba