Patents by Inventor Kazuo Nomura

Kazuo Nomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7486556
    Abstract: A semiconductor memory is achieved which allows a reduction in the area of a memory array block without reducing the gate widths of floating gates. A plurality of select gates extend in straight lines in the X direction. Between the upper- and lower-side select gates, two rows' worth of floating gates are arranged. The plurality of floating gates are placed in a staggered arrangement (in other words, in a zigzag pattern). That is, looking at one floating gate in a specific column and another floating gate in a column adjacent to that specific column, those floating gates deviate from each other in the Y direction.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: February 3, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Yutaka Takikawa, Koichi Kawauchi, Satoko Kamakura, Kazuo Nomura, Kazuyuki Kawamoto, Nobutaka Imanishi
  • Patent number: 7463309
    Abstract: A data slicer of the present invention comprises a reference voltage generation circuit and a comparator. The reference voltage generation circuit comprises a plurality of capacitances which area connected in parallel to one another, holding electrical charges on the basis of an input signal, a plurality of first switches which are connected to the plurality of capacitances with first nodes, respectively, for controlling the inflow of the input signal to the plurality of capacitances and a plurality of second switches which are connected to the plurality of capacitances with the first nodes, respectively, for controlling the connection among the plurality of capacitances. The plurality of first switches are controlled with predetermined timing where these first switches are individually brought into an ON state, and the plurality of second switches are controlled with predetermined timing where all the second switches are brought into an ON state.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: December 9, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Rie Matsuo, Kazuo Nomura
  • Publication number: 20080234894
    Abstract: An apparatus that controls opening and closing of a roof glass is disclosed. The apparatus includes a drive motor that is actuated to selectively open and close the roof glass. The apparatus stores a count value that changes in correspondence with operation of the drive motor. The apparatus detects the number of cycles of reset starting and determines whether the detected number of the reset starting cycles is in a predetermined acceptable range. The apparatus switches initial setting, in accordance with which the relative relationship between the actual open/closed position of the roof glass and the count value is determined, to a non-set state if it is determined that the number of the reset starting cycles exceeds the acceptable range.
    Type: Application
    Filed: March 21, 2008
    Publication date: September 25, 2008
    Applicant: ASMO Co., Ltd.
    Inventors: Kazuo Nomura, Kazuyuki Hirai
  • Publication number: 20080175051
    Abstract: A semiconductor memory is achieved which allows a reduction in the area of a memory array block without reducing the gate widths of floating gates. A plurality of select gates extend in straight lines in the X direction. Between the upper- and lower-side select gates, two rows' worth of floating gates are arranged. The plurality of floating gates are placed in a staggered arrangement (in other words, in a zigzag pattern). That is, looking at one floating gate in a specific column and another floating gate in a column adjacent to that specific column, those floating gates deviate from each other in the Y direction.
    Type: Application
    Filed: August 6, 2007
    Publication date: July 24, 2008
    Inventors: Yutaka Takikawa, Koichi Kawauchi, Satoko Kamakura, Kazuo Nomura, Kazuyuki Kawamoto, Nobutaka Imanishi
  • Patent number: 7400530
    Abstract: A semiconductor memory is achieved which allows a reduction in the area of a memory array block without reducing the gate widths of floating gates. A plurality of select gates extend in straight lines in the X direction. Between the upper- and lower-side select gates, two rows' worth of floating gates are arranged. The plurality of floating gates are placed in a staggered arrangement (in other words, in a zigzag pattern). That is, looking at one floating gate in a specific column and another floating gate in a column adjacent to that specific column, those floating gates deviate from each other in the Y direction.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: July 15, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Yutaka Takikawa, Koichi Kawauchi, Satoko Kamakura, Kazuo Nomura, Kazuyuki Kawamoto, Nobutaka Imanishi
  • Publication number: 20080055183
    Abstract: An antenna apparatus is disclosed that includes a synthetic resin case having an antenna element accommodating portion and a ground element accommodating portion, an antenna element made of punched sheet metal that is accommodated within the antenna element accommodating portion, a ground element made of punched sheet metal that is accommodated within the ground element accommodating portion and aligned with the antenna element, a surface mount coaxial connector that is mounted over an interface between the antenna element and the ground element, and a cover that covers the antenna element and the ground element.
    Type: Application
    Filed: May 25, 2007
    Publication date: March 6, 2008
    Applicant: FUJITSU COMPONENT LIMITED
    Inventors: Takashi Yuba, Shigemi Kurashima, Hideki Iwata, Masahiro Yanagi, Takashi Arita, Toshihiro Kusagaya, Kazuhiko Ikeda, Hiroshi Matsumiya, Kazuo Nomura
  • Publication number: 20070285991
    Abstract: A semiconductor memory is achieved which allows a reduction in the area of a memory array block without reducing the gate widths of floating gates. A plurality of select gates extend in straight lines in the X direction. Between the upper- and lower-side select gates, two rows' worth of floating gates are arranged. The plurality of floating gates are placed in a staggered arrangement (in other words, in a zigzag pattern). That is, looking at one floating gate in a specific column and another floating gate in a column adjacent to that specific column, those floating gates deviate from each other in the Y direction.
    Type: Application
    Filed: August 6, 2007
    Publication date: December 13, 2007
    Inventors: Yutaka Takikawa, Koichi Kawauchi, Satoko Kamakura, Kazuo Nomura, Kazuyuki Kawamoto, Nobutaka Imanishi
  • Patent number: 7307889
    Abstract: A semiconductor memory is achieved which allows a reduction in the area of a memory array block without reducing the gate widths of floating gates. A plurality of select gates extend in straight lines in the X direction. Between the upper- and lower-side select gates, two rows' worth of floating gates are arranged. The plurality of floating gates are placed in a staggered arrangement (in other words, in a zigzag pattern). That is, looking at one floating gate in a specific column and another floating gate in a column adjacent to that specific column, those floating gates deviate from each other in the Y direction.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: December 11, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Yutaka Takikawa, Koichi Kawauchi, Satoko Kamakura, Kazuo Nomura, Kazuyuki Kawamoto, Nobutaka Imanishi
  • Publication number: 20070242937
    Abstract: A shake detection device detecting a camera shake amount generated when photographing a subject includes a detection sensor detecting a rotation speed around a predetermined axis of the camera, a first image shift amount calculation unit driving the detection sensor to detect the rotation speed and, for an image of the subject photographed by the camera, calculating a first image shift amount as an image shift amount in a first direction based on the rotation speed, a second image shift amount calculation unit performing a predetermined image analysis on the image of the subject photographed by the camera and, for the image of the subject photographed by the camera, calculating a second image shift amount as an image shift amount in a second direction based on the analysis result, and a shake amount estimation unit estimating the camera shake amount using the first and second image shift amounts.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 18, 2007
    Applicant: Seiko Epson Corporation
    Inventors: Megumi Sano, Kazuo Nomura
  • Publication number: 20070229360
    Abstract: A disclosed antenna apparatus includes: a punched out antenna element made of a sheet metal; a punched out ground element made of a sheet metal, the ground element facing the antenna element; and a surface mount type coaxial connector mounted across the antenna element and the ground element.
    Type: Application
    Filed: October 17, 2006
    Publication date: October 4, 2007
    Applicant: FUJITSU COMPONENT LIMITED
    Inventors: Masahiro Yanagi, Shigemi Kurashima, Hideki Iwata, Takashi Yuba, Masahiro Kaneko, Yuriko Segawa, Takashi Arita, Toshihiro Kusagaya, Kazuhiko Ikeda, Hiroshi Matsumiya, Kazuo Nomura
  • Publication number: 20070230931
    Abstract: A subject shake detection device includes a shake detection unit that detects a shake amount of an imaging unit for photographing a subject, a subject shake detection unit that detects an image shake amount from a motion picture to be photographed by the imaging unit and acquires a subject shake amount on the basis of a difference between the image shake amount and the shake amount, and an informing unit that informs a subject shake on the basis of the subject shake amount.
    Type: Application
    Filed: April 2, 2007
    Publication date: October 4, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Kazuo NOMURA, Michihiro NAGAISHI, Megumi SANO
  • Publication number: 20070147814
    Abstract: An image capturing apparatus includes: a shake amount detecting unit that detects a shake amount; a composition determining unit that determines whether the composition of a picture is determined during image capturing on the basis of the correlation among a plurality of frames; a shake correcting unit that performs a shake correcting process on a captured image on the basis of the detected camera shake amount; and a correction control unit that controls the shake correcting unit to start the shake correcting process when the shake amount is smaller than a predetermined reference shake amount and it is determined that the composition of a picture is determined.
    Type: Application
    Filed: December 28, 2006
    Publication date: June 28, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Kazuo NOMURA, Michihiro NAGAISHI, Kazuhiro SAKAMOTO
  • Publication number: 20070140674
    Abstract: A filming device according to the invention includes a filming unit which imports a plurality of frames configuring a moving image at a prescribed sampling rate, a shake amount detection unit which detects a shake amount of each of the frames, a frame position calculation unit which calculates a frame position of each frame based on the shake amount, a reference frame position determination unit which determines a reference frame position to be a reference of a display subject frame, and a frame selection and transmission unit which selects and sequentially transmits frames positioned within a prescribed range centered on the reference frame position.
    Type: Application
    Filed: November 22, 2006
    Publication date: June 21, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Kazuo NOMURA, Megumi Sano, Michihiro NAGAISHI, Tatsuya HOSODA
  • Publication number: 20070127903
    Abstract: A photographic apparatus includes a shooting section for performing shooting based on an operation of an operation part for instructing shooting, a tremor detection section for detecting a tremor amount of the shooting section, and a shooting control section for causing detection by the tremor detection section the tremor amount at least one of before and after an operation of the operation part, specifying a hand tremor tendency of a photographer based on the tremor amount, and instructing the execution of a shooting process in accordance with the specified hand tremor tendency.
    Type: Application
    Filed: November 28, 2006
    Publication date: June 7, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Kazuo Nomura, Michihiro Nagaishi, Megumi Sando, Hiroki Masuzawa
  • Publication number: 20070122130
    Abstract: A controller is provided which includes a photographing control unit controlling an image pickup unit to take a photograph and a shake detecting unit detecting an amount of shake even time the image pickup unit takes a photograph. Here, the photographing control unit allows the image pickup unit to consecutively take a photograph and ends the photographing operation of the image pickup unit when the amount of shake detected by the shake detecting unit at the time of the photographing operation of the image pickup unit is larger than the amount of shake detected at the time of the previous photographing operation.
    Type: Application
    Filed: November 28, 2006
    Publication date: May 31, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Kazuo NOMURA, Tatsuya HOSODA
  • Publication number: 20070122139
    Abstract: A controller includes a photographing control unit controlling an image pickup unit taking a photograph of an object to perform a short-time photographing operation in which an exposure time is set shorter than a normal exposure time and an image correcting unit acquiring correction information for correcting image data taken in the short-time photographing operation and correcting the image data using the acquired correction information.
    Type: Application
    Filed: November 28, 2006
    Publication date: May 31, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Kazuo Nomura, Tatsuya Hosoda
  • Publication number: 20060280429
    Abstract: An image capturing device includes an image capturer, operable to perform a first image capturing of an object image so as to generate first image data corresponding to a first time period shorter than a predetermined time period, and operable to perform a second image capturing of the object image so as to generate second image data corresponding to a second time period shorter than the predetermined time period, a storage, adapted to store the first image data and the second image data, and an image generator, operable to generate image data corresponding to the predetermined time period based on the first image data and the second image data.
    Type: Application
    Filed: June 8, 2006
    Publication date: December 14, 2006
    Inventors: Hideto Shimosato, Kazuo Nomura
  • Publication number: 20060238828
    Abstract: An image correction system includes an image capturer, operable to capture an object image and to generate image data based on the object image, a first storage, adapted to store the image data, a timing signal generator, operable to periodically generate timing signals, an image processor, operable to periodically store the image data into the first storage in accordance with each of the timing signals, a detector, operable to periodically detect movement of the image capturer and to generate movement data based on the detected movement, and a second storage, adapted to periodically store the movement data in association with timing data based on each of the timing signals.
    Type: Application
    Filed: March 9, 2006
    Publication date: October 26, 2006
    Inventors: Shigenori Kanno, Kazuo Nomura, Oh Jaekwan
  • Publication number: 20060140599
    Abstract: An imaging apparatus includes an imaging part that images a subject to generate image data, an image storage part that temporarily stores original image data that was imaged by the imaging part, an image data size reducing part that forms image data for display by reducing the size of image data stored in the image storage part, and an image display part that displays image data for display that was formed by the image data size reducing part; the imaging apparatus further comprising a camera shake state detection part that detects a camera shake occurrence state of the imaging part, a camera shake decision part that decides whether or not camera shake occurred for image data for display that was reduced by the image data size reducing part based on a camera shake state that was detected by the camera shake state detection part, and a camera shake correction part that, when a result decided by the camera shake decision part is that a camera shake occurrence state exists, subjects the image data for display to
    Type: Application
    Filed: December 19, 2005
    Publication date: June 29, 2006
    Inventors: Kazuo Nomura, Hiroyuki Yokoyama
  • Publication number: 20050226053
    Abstract: A semiconductor memory is achieved which allows a reduction in the area of a memory array block without reducing the gate widths of floating gates. A plurality of select gates extend in straight lines in the X direction. Between the upper- and lower-side select gates, two rows' worth of floating gates are arranged. The plurality of floating gates are placed in a staggered arrangement (in other words, in a zigzag pattern). That is, looking at one floating gate in a specific column and another floating gate in a column adjacent to that specific column, those floating gates deviate from each other in the Y direction.
    Type: Application
    Filed: April 5, 2005
    Publication date: October 13, 2005
    Applicant: Renesas Technology Corp.
    Inventors: Yutaka Takikawa, Koichi Kawauchi, Satoko Kamakura, Kazuo Nomura, Kazuyuki Kawamoto, Nobutaka Imanishi