Patents by Inventor Kazuo Ohtsubo

Kazuo Ohtsubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9853072
    Abstract: Provided are a solid-state imaging element, which suppresses occurrence of a dark current and a white spot and even suppresses occurrence of a residual image, and a manufacturing method for the solid-state imaging element. A solid-state imaging element (1) is provided with: a gate electrode (4) above a substrate (2); a charge storage region (5) formed at a position inside the substrate (2) and apart from a top surface (2a) of the substrate (2); a read region (6) formed at a position inside the substrate (2) and on the opposite side to the charge storage region (5) with the gate electrode (4) interposed therebetween; a channel region (7, 8) formed inside the substrate (2) and immediately below the gate electrode (4); and a shield region (9) and an intermediate region (10) formed inside the substrate (2) and between the top surface (2a) of the substrate (2) and the charge storage region (5).
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: December 26, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Kazuo Ohtsubo
  • Publication number: 20150060962
    Abstract: Provided are a solid-state imaging element, which suppresses occurrence of a dark current and a white spot and even suppresses occurrence of a residual image, and a manufacturing method for the solid-state imaging element. A solid-state imaging element (1) is provided with: a gate electrode (4) above a substrate (2); a charge storage region (5) formed at a position inside the substrate (2) and apart from a top surface (2a) of the substrate (2); a read region (6) formed at a position inside the substrate (2) and on the opposite side to the charge storage region (5) with the gate electrode (4) interposed therebetween; a channel region (7, 8) formed inside the substrate (2) and immediately below the gate electrode (4); and a shield region (9) and an intermediate region (10) formed inside the substrate (2) and between the top surface (2a) of the substrate (2) and the charge storage region (5).
    Type: Application
    Filed: February 27, 2013
    Publication date: March 5, 2015
    Inventor: Kazuo Ohtsubo
  • Patent number: 8106984
    Abstract: A solid-state image capturing apparatus includes a pixel array in which a plurality of pixels are arranged in a matrix, where each of the pixels includes: a photodiode for obtaining a signal charge by a photoelectric conversion of an incident light; and an amplifying transistor for the signal charge obtained at the photodiode, and where the amplifying transistor is configured in such a manner that a gate area of the amplifying transistor is defined to be larger than a gate area of other transistors that configure the pixel.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: January 31, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Noboru Takeuchi, Kazuo Ohtsubo
  • Publication number: 20110151613
    Abstract: A solid-state image capturing element according to the present invention is provided, in which one or a plurality of light receiving sections for photoelectrically converting an incident light to generate a signal charge is provided on a surface of a semiconductor area or a surface of a semiconductor substrate and a peripheral circuit with a transistor is provided, where a reflection preventing film provided above the light receiving sections and a gate sidewall film of the transistor are formed with a common nitride film that is formed simultaneously.
    Type: Application
    Filed: February 22, 2011
    Publication date: June 23, 2011
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Kenichi Nagai, Noboru Takeuchi, Kazuo Ohtsubo, Yuhji Hara
  • Publication number: 20090219422
    Abstract: A solid-state image capturing apparatus includes a pixel array in which a plurality of pixels are arranged in a matrix, where each of the pixels includes: a photodiode for obtaining a signal charge by a photoelectric conversion of an incident light; and an amplifying transistor for the signal charge obtained at the photodiode, and where the amplifying transistor is configured in such a manner that a gate area of the amplifying transistor is defined to be larger than a gate area of other transistors that configure the pixel.
    Type: Application
    Filed: February 25, 2009
    Publication date: September 3, 2009
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Noboru Takeuchi, Kazuo Ohtsubo
  • Publication number: 20090184344
    Abstract: A solid-state image capturing element according to the present invention is provided, in which one or a plurality of light receiving sections for photoelectrically converting an incident light to generate a signal charge is provided on a surface of a semiconductor area or a surface of a semiconductor substrate and a peripheral circuit with a transistor is provided, where a reflection preventing film provided above the light receiving sections and a gate sidewall film of the transistor are formed with a common nitride film that is formed simultaneously.
    Type: Application
    Filed: January 14, 2009
    Publication date: July 23, 2009
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Kenichi Nagai, Noboru Takeuchi, Kazuo Ohtsubo, Yuhji Hara
  • Patent number: 6437626
    Abstract: A “PN junction element ta which produces the Peltier effect and Seebeck effect within the same element and imparts a noise reducing effect,” which prevents an adverse influence of white noise included in an AC waveform to be supplied from a commercially available AC power supply or a parasitic noise or the like caused by electromagnetic interference on an electromagnetic device that is supplied with power and which is effective when attached at the designing or manufacturing stage to each “low-power” functional circuit which provides a later-attached or externally-attached device is adapted to a “high-power” circuit.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: August 20, 2002
    Inventor: Kazuo Ohtsubo
  • Patent number: 5869892
    Abstract: Disclosed are a noise eliminating element having a junction of components of two kinds of electroconductive materials, characterized in that the absolute values of the thermoelectric power of the two kinds of materials is 50 .mu.VK.sup.-1 or higher and there is substantially no rectifying action at the junction. Both the Seebeck effect and the Paltier effect occur simultaneous and create a transient phenomena in one element. Because of the transient phenomena in one element and because of the transient phenomenon based on both effects, noises, particularly the standing wave noises generated at around output current near to zero are eliminated. The noise eliminating elements can be inserted in a magnetic circuit of a speaker circuit for acoustic equipment or in a diflecting coil circuit of an electron image display device.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: February 9, 1999
    Assignees: Melcor Japan Co., Ltd., Kinichi Uemura
    Inventors: Kazuo Ohtsubo, Kinichi Uemura
  • Patent number: 5491452
    Abstract: Disclosed are a noise eliminating element having a junction of components of two kinds of electroconductive materials, characterized in that the absolute values of the thermoelectric power of the two kinds of materials is 50 .mu.VK.sup.-1 or higher and there is substantially no rectifying action at the junction. Both the Seebeck effect and the Paltier effect occur simultaneous and create a transient phenomena in one element. Because of the transient phenomena in one element and because of the transient phenomenon based on both effects, noises, particularly the standing wave noises generated at around output current near to zero are eliminated. The noise eliminating elements can be inserted in a magnetic circuit of a speaker circuit for acoustic equipment or in a deflecting coil circuit of an electron image display device.
    Type: Grant
    Filed: October 26, 1994
    Date of Patent: February 13, 1996
    Assignees: Melcor Japan Co., Ltd., Kinichi Uemura
    Inventors: Kazuo Ohtsubo, Kinichi Uemura