Patents by Inventor Kazuo Ryu

Kazuo Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5426431
    Abstract: Disclosed is an analog/digital (A/D) converter, which comprises an M-bit resistor-string type digital/analog (D/A) converter, a charge re-distribution type N-bit D/A converter, a comparator, a successive approximation register for storing the output of the comparator, and first and second switch controllers for respectively controlling the two D/A converters in accordance with the output of the successive approximation register. The N-bit D/A converter uses voltages at both ends a and b of an arbitrary unit resistor of the resistor string of the M-bit D/A converter as reference voltages. The comparator has a differential amplifier whose one input terminal is connected to a capacitor for sampling an analog input signal. The output of the N-bit D/A converter is connected to the other input terminal of the differential amplifier.
    Type: Grant
    Filed: November 9, 1993
    Date of Patent: June 20, 1995
    Assignee: NEC Corporation
    Inventor: Kazuo Ryu
  • Patent number: 4785262
    Abstract: A pulse generator includes a capacitor having one end held at a reference potential and the other end, a first inverter having a threshold voltage and its input portion connected to the other end of the capacitor, a control circuit producing a signal for discharging the capacitor for a limited time period in response to an output from the first inverter, a switch for discharging the capacitor in response to the discharging signal, a resistor having a resistance, a current controller controlling the current flowing through the resistor to have a value obtained by dividing the threshold voltage by the resistance, and a means for supplying the current to the capacitor, output pulses being derived from input and/or output portion and/or internal portion of the control circuit. The control circuit may be a monostable multivibrator, a delay circuit or the like.
    Type: Grant
    Filed: December 23, 1986
    Date of Patent: November 15, 1988
    Assignee: NEC Corporation
    Inventors: Kazuo Ryu, Kyuichi Hareyama
  • Patent number: 4667178
    Abstract: A digital to analog converter is disclosed which can operate with a high accuracy and can be fabricated at a highly integrated structure.The converter comprises a voltage divider circuit dividing a reference voltage into a plurality of divided voltages, a plurality of P-channel field effect transistor switches for selectively extracting a higher potential part of the divided voltages and a plurality of N-channel field effect transistor switches for selectively extracting a lower potential part of the divided voltages, wherein both of P-channel and N-channel transistors operate in a triode-region.
    Type: Grant
    Filed: January 16, 1984
    Date of Patent: May 19, 1987
    Assignee: NEC Corporation
    Inventor: Kazuo Ryu
  • Patent number: 4647903
    Abstract: In order to reduce the numbers of resistors and associated switches required in a successive approximation type a-d converter, a resistor-ladder of the d-a converter utilizes a first group of resistors (resistance R) and a second group of resistors each having a resistance equal to R/2.sup.L wherein L is the number of lower bits of the digital output. The second group of resistors enables the generation of variable comparison reference signals in response to the output of a successive approximation register.
    Type: Grant
    Filed: March 7, 1984
    Date of Patent: March 3, 1987
    Assignee: NEC Corporation
    Inventor: Kazuo Ryu
  • Patent number: 4503421
    Abstract: A digital to analog converter having an improved conversion linearity is disclosed.The digital to analog converter comprises means for receiving an input digital signal (1), means for dividing the first digital signal to a plurality of digital signals (2, 3), a plurality of conversion means (8, 9) for converting the divided digital signals to analog signals, respectively, and means (10) for summing the analog signals to produce a summed analog signal corresponding to the input digital signal.
    Type: Grant
    Filed: May 26, 1982
    Date of Patent: March 5, 1985
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Kyuichi Hareyama, Kenji Shiraki, Kazuo Ryu