Patents by Inventor Kazuo Satou
Kazuo Satou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10540816Abstract: Provided is an information display system configured to display auxiliary information in a real space in a superimposed manner, depending on the visibility of a workpiece. The information display system is provided with a mapping unit configured to photograph the workpiece and create model data indicative of the shape of the workpiece, a complementary unit configured to generate a 3D model image of at least a part of the workpiece based on 3D model data of the workpiece and complement an invisible part of the workpiece by the 3D model image, and a display unit configured to display the 3D model image so as to be superimposed on the invisible part of the workpiece.Type: GrantFiled: January 22, 2018Date of Patent: January 21, 2020Assignee: FANUC CORPORATIONInventors: Kouhei Kuribara, Kenji Shimizu, Kazuo Satou, Hideaki Maeda
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Patent number: 10466658Abstract: A numerical controller has a machine learning device that performs machine learning of the adjustment of a setting value used in override control. The machine learning device acquires state data showing states of the numerical controller and a machine, sets reward conditions, calculates a reward based on the state data and the reward conditions, performs the machine learning of the adjustment of the setting value used in override control, and determines the adjustment of the setting value used in override control, based on a machine learning result and the state data.Type: GrantFiled: January 12, 2018Date of Patent: November 5, 2019Assignee: Fanuc CorporationInventors: Kenji Shimizu, Kazuo Satou, Hideaki Maeda
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Publication number: 20180210406Abstract: A numerical controller has a machine learning device that performs machine learning of the adjustment of a setting value used in override control. The machine learning device acquires state data showing states of the numerical controller and a machine, sets reward conditions, calculates a reward based on the state data and the reward conditions, performs the machine learning of the adjustment of the setting value used in override control, and determines the adjustment of the setting value used in override control, based on a machine learning result and the state data.Type: ApplicationFiled: January 12, 2018Publication date: July 26, 2018Applicant: FANUC CORPORATIONInventors: Kenji Shimizu, Kazuo Satou, Hideaki Maeda
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Publication number: 20180211442Abstract: Provided is an information display system configured to display auxiliary information in a real space in a superimposed manner, depending on the visibility of a workpiece. The information display system is provided with a mapping unit configured to photograph the workpiece and create model data indicative of the shape of the workpiece, a complementary unit configured to generate a 3D model image of at least a part of the workpiece based on 3D model data of the workpiece and complement an invisible part of the workpiece by the 3D model image, and a display unit configured to display the 3D model image so as to be superimposed on the invisible part of the workpiece.Type: ApplicationFiled: January 22, 2018Publication date: July 26, 2018Inventors: Kouhei KURIBARA, Kenji SHIMIZU, Kazuo SATOU, Hideaki MAEDA
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Patent number: 7969278Abstract: A thermistor has a sealing portion of glass which seals at least a thermistor element body, first and second electrodes, and ends of the first and second lead wires and an insulating portion which covers portions of the first and second lead wires exposed from the sealing portion. The first and second lead wires are spaced from each other and include respective first portions extending from the aforementioned ends and spaced from each other with a first space, respective second portions spaced from each other with a second space larger than the first space, and respective third portions spaced from each other with a space varying from the first space to the second space, between the first and second portions. The insulating portion covers the first portions of the first and second lead wires together and covers the second and third portions of the first and second lead wires independently for each of the first and second lead wires.Type: GrantFiled: June 29, 2009Date of Patent: June 28, 2011Assignee: TDK CorporationInventors: Satoshi Kato, Hirokazu Kobayashi, Kazuo Satou, Tsuneki Tanaka, Takuto Horii
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Patent number: 7970651Abstract: A commercial article information presenting system includes a shopping basket device and a shopping server communicating with the shopping basket device. The shopping basket device acquires a tag ID from an electronic tag attached to a commercial article put in a shopping basket and transmits the tag ID to a shop server. The shop server stores the tag ID received from the shopping basket device, generates screen data for an itemization screen for indicating a commercial article identifier and a unit price corresponding to the stored tag ID, a total of unit prices. The shop server transmits the screen data for the itemization screen to the shopping basket device.Type: GrantFiled: May 5, 2009Date of Patent: June 28, 2011Assignee: Fujitsu LimitedInventor: Kazuo Satou
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Publication number: 20100052842Abstract: A thermistor has a sealing portion of glass which seals at least a thermistor element body, first and second electrodes, and ends of the first and second lead wires and an insulating portion which covers portions of the first and second lead wires exposed from the sealing portion. The first and second lead wires are spaced from each other and include respective first portions extending from the aforementioned ends and spaced from each other with a first space, respective second portions spaced from each other with a second space larger than the first space, and respective third portions spaced from each other with a space varying from the first space to the second space, between the first and second portions. The insulating portion covers the first portions of the first and second lead wires together and covers the second and third portions of the first and second lead wires independently for each of the first and second lead wires.Type: ApplicationFiled: June 29, 2009Publication date: March 4, 2010Applicant: TDK CORPORATIONInventors: Satoshi KATO, Hirokazu KOBAYASHI, Kazuo SATOU, Tsuneki TANAKA, Takuto HORII
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Publication number: 20090302106Abstract: A commercial article information presenting system includes a shopping basket device and a shopping server communicating with the shopping basket device. The shopping basket device acquires a tag ID from an electronic tag attached to a commercial article put in a shopping basket and transmits the tag ID to a shop server. The shop server stores the tag ID received from the shopping basket device, generates screen data for an itemization screen for indicating a commercial article identifier and a unit price corresponding to the stored tag ID, a total of unit prices. The shop server transmits the screen data for the itemization screen to the shopping basket device.Type: ApplicationFiled: May 5, 2009Publication date: December 10, 2009Applicant: FUJITSU LIMITEDInventor: Kazuo Satou
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Patent number: 5611592Abstract: A rear body structure of an automobile having a door in its rear portion comprises a side panel forming a side surface of an automobile body and a rear panel connected to the side panel and forming a rear surface, the side panel being comprised of an outer side panel and an inner side panel. On an outer surface of a rear part of the inner side panel, there is provided a reinforcing member extending vertically of the body, to which an auxiliary reinforcing member, extending between the inner and outer side panels rearwardly of the body, is connected. The auxiliary reinforcing member is connected at its rear portion to an inner end of the rear panel by means of the corner member. As a result, improved rigidity is provided at the rear panel and connection between the same and the side panel without providing any other member which projects into the inside of the automobile.Type: GrantFiled: October 18, 1995Date of Patent: March 18, 1997Assignee: Honda Giken Kogyo Kabushiki KaishaInventors: Kazuo Satou, Tomoyuki Inoue, Yoshiaki Hino
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Patent number: 5282912Abstract: A methods and an apparatus for applying the belt-shaped bead filler on the bead core with apex. The method comprises the the steps of: rotating a bead core with an apex together with a belt-shaped bead filler; mounting the bead filler on the internal circumferential surface in an approximately cylindrical shape so as to form an overlapping portion; joining at least a part of the overlapping portion; folding up the cylindrical bead filler on both sides of apex and bead core and press-fitting so as to unify them.Type: GrantFiled: January 7, 1992Date of Patent: February 1, 1994Assignee: Sumitomo Rubber Industries, Ltd.Inventors: Satoru Kokubu, Susumu Itou, Susumu Suga, Kazuo Satou
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Patent number: 5108538Abstract: A method and an apparatus for applying the belt-shaped bead filler on the bead core with apex. The method comprises the the step of: rotating a bead core with an apex together with a belt-shaped bead filler; mounting the bead filler on the internal circumferential surface in an approximately cylindrical shape so as to form an overlapping portion; joining at least a part of the overlapping portion; folding up the cylindrical bead filler on both sides of apex and bead core and press-fitting so as to unify them.Type: GrantFiled: August 14, 1990Date of Patent: April 28, 1992Assignee: Sumitomo Rubber Industries, Ltd.Inventors: Satoru Kokubu, Susumu Itou, Susumu Suga, Kazuo Satou
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Patent number: 4856469Abstract: A valve driving mechanism of which a rocker arm is provided at one end portion with a roller brought into a rotative contact with a cam surface of a cam for driving engine valves. The cam consists of 2.0-4.0 wt % of C, 1.5-3.5 wt % of Si, 0.1-1.0 wt % of Mn, 0.005-0.08 wt % of Mg, less than 0.15 wt % of P, less than 0.15 wt % of S, 0.3-1.0 wt % of Cu, 0.03-0.09 wt % of Mo with the balance of Fe, with a matrix of the cam being a granular graphite cast iron having a mixed structure of 30-50 vol % of residual austenite structure and a bainite structure.Type: GrantFiled: September 22, 1988Date of Patent: August 15, 1989Assignee: Mazda Motor CorporationInventors: Ken Okazaki, Kazuo Satou, Junichi Yamamoto
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Patent number: 4838956Abstract: Spheroidal graphite cast iron whose matrix is composed of a mixture of bainite and retained austenite, containing 250 to 800 graphite grains/mm.sup.2, and its production method comprising the steps of forming the casting, annealing the casting so as to change the matrix to ferrite, machining the casting and subjecting the casting to austempering so as to subject the casting to austenitizing and isothermal transformation.Type: GrantFiled: April 14, 1988Date of Patent: June 13, 1989Assignee: Mazda Motor CorporationInventors: Kazuo Satou, Ken Okazaki
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Patent number: 4450019Abstract: A ductile cast iron excellent in resistance to both oxidation at high temperatures and thermal fatigue, comprising C: 2.5 to 3.8 wt %, Si: 3.5 to 4.8 wt %, Mn: up to 1.0 wt %, P: up to 0.1 wt %, S: up to 0.1 wt %, Mo: 0.5 to 2.0 wt %, Mg: 0.03 to 0.1 wt %, at least one of Ce and La: 0.02 to 0.5 wt %, and Fe.Type: GrantFiled: March 30, 1983Date of Patent: May 22, 1984Assignee: Toyo Kogyo Co., Ltd.Inventors: Kazuo Satou, Masashi Yoritaka
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Patent number: 4302875Abstract: A CMOS device comprising an N type semiconductor substrate, a P type well region diffused in the substrate, an n-channel MOS transistor formed in the P type well region, and a p-channel MOS transistor formed in the N type semiconductor substrate, and a method for manufacturing the CMOS device. In case the CMOS device serves as a CMOS inverter, the source region of the p-channel MOS transistor, the semiconductor substrate and the well layer constitute a parasitic PNP type bipolar transistor, and the source region of the n-channel MOS transistor, the well layer and the semiconductor substrate constitute a parasitic NPN type bipolar transistor. The product of the current amplification factor .beta..sub.1 of the PNP type bipolar transistor and the current amplification factor .beta..sub.2 of the NPN type bipolar transistor is smaller than 1.Type: GrantFiled: May 23, 1979Date of Patent: December 1, 1981Assignee: Tokyo Shibaura Electric Co., Ltd.Inventors: Kazuo Satou, Mitsuhiko Ueno
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Patent number: 4209713Abstract: A semiconductor integrated circuit device comprising a CMOS circuit in which parasitic transistors form a parasitic thyristor circuit. In this device, noise absorption resistances are provided at the noise inputs to absorb noise which otherwise might become trigger pulses for the thyristors.Type: GrantFiled: May 31, 1978Date of Patent: June 24, 1980Assignee: Tokyo Shibaura Electric Co., Ltd.Inventors: Kazuo Satou, Mitsuhiko Ueno, Yasoji Suzuki
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Patent number: 4168442Abstract: A CMOS FET device which comprises an N type semiconductor substrate; a P type well layer formed in the N type semiconductor substrate; a p-channel type MOS transistor provided in the N type semiconductor substrate; an n-channel type MOS transistor formed in the P type well layer; and a noise-absorbing capacitor provided at the input or output terminal of the MOS transistor or at a power supply section.Type: GrantFiled: May 23, 1978Date of Patent: September 18, 1979Assignee: Tokyo Shibaura Electric Co., Ltd.Inventors: Kazuo Satou, Mitsuhiko Ueno, Yasoji Suzuki
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Patent number: 4167747Abstract: A CMOS device comprising an N type semiconductor substrate, a P type well region diffused in the substrate, an n-channel MOS transistor formed in the P type well region, and a p-channel MOS transistor formed in the N type semiconductor substrate, and a method for manufacturing the CMOS device. In case the CMOS device serves as a CMOS inverter, the source region of the p-channel MOS transistor, the semiconductor substrate and the well layer constitute a parasitic PNP type bipolar transistor, and the source region of the n-channel MOS transistor, the well layer and the semiconductor substrate constitute a parasitic NPN type bipolar transistor. The product of the current amplification factor .beta..sub.1 of the PNP type bipolar transistor and the current amplification factor .beta..sub.2 of the NPN type bipolar transistor is smaller than 1.Type: GrantFiled: March 24, 1978Date of Patent: September 11, 1979Assignee: Tokyo Shibaura Electric Co., Ltd.Inventors: Kazuo Satou, Mitsuhiko Ueno
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Patent number: 4152717Abstract: A CMOS FET device having a P well layer diffused in an N type semiconductor substrate, a P channel MOS transistor formed on the N type semiconductor substrate, and an N channel MOS transistor provided in the P well layer, wherein the source of the P channel MOS transistor is made to have the same potential as the N type semiconductor substrate and for the source of the N channel MOS transistor is made to have the same potential as the P well layer, thereby suppressing the operation of a parasitic bipolar transistor whose base is constituted by the N type semiconductor substrate and/or a parasitic bipolar transistor whose base is formed of the P well layer.Type: GrantFiled: June 20, 1978Date of Patent: May 1, 1979Assignee: Tokyo Shibaura Electric Co., Ltd.Inventors: Kazuo Satou, Mitsuhiko Ueno
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Patent number: D717343Type: GrantFiled: September 12, 2013Date of Patent: November 11, 2014Assignee: Komatsu Ltd.Inventors: Hiroyuki Chino, Hidehiko Kobayashi, Tatsuya Watahiki, Kazuo Satou, Yoshio Yokozuka, Tomonori Oda