Abstract: An optical link module of the present invention for connecting light beams by deflection and including light-emitting devices arranged in a planar manner; an optical fiber bundle that is an optical waveguide for receiving the light beams from the light-emitting devices, and an optical turn which includes a plurality of aspherical lenses which are disposed between the light-emitting devices and the optical fiber bundle and are formed while corresponding to the number of the light-emitting devices and the number of optical fibers.

Abstract: An optical link module of the present invention for connecting light beams by deflection and including light-emitting devices arranged in a planar manner; an optical fiber bundle that is an optical waveguide for receiving the light beams from the light-emitting devices, and an optical turn which includes a plurality of aspherical lenses which are disposed between the light-emitting devices and the optical fiber bundle and are formed while corresponding to the number of the light-emitting devices and the number of optical fibers.

Abstract: An optical link module of the present invention for connecting light beams by deflection and including light-emitting devices arranged in a planar manner; an optical fiber bundle that is an optical waveguide for receiving the light beams from the light-emitting devices, and an optical turn which includes a plurality of aspherical lenses which are disposed between the light-emitting devices and the optical fiber bundle and are formed while corresponding to the number of the light-emitting devices and the number of optical fibers.

Abstract: An overdrive controller for driving a liquid crystal display includes a change rate Rst calculating section for comprehending a transition state from a present brightness to a targeted brightness for each of R, G and B sub-pixels, a select section for selecting the sub-pixel with the slowest transition and the other sub-pixels from the comprehended transition states, and an overdrive voltage calculating section for calculating a voltage to accelerate a transition of brightness for the sub-pixel with the slowest transition. The overdrive controller further includes, an effective brightness Yst? calculating section and Yst? overdrive voltage calculating section for calculating a voltage to accelerate or to decelerate a transition of brightness for the other sub-pixels in order to coordination with each other, wherein the voltage is switched by a switch 23 to be supplied.

Abstract: An optical link module of the present invention for connecting light beams by deflection and including light-emitting devices arranged in a planar manner; an optical fiber bundle that is an optical waveguide for receiving the light beams from the light-emitting devices, and an optical turn which includes a plurality of aspherical lenses which are disposed between the light-emitting devices and the optical fiber bundle and are formed while corresponding to the number of the light-emitting devices and the number of optical fibers.

Abstract: A system (method and program for storing the method) for displaying an image, includes a motion object detector for detecting a motion object in image information inputted to the system, a recognizing device for recognizing a moving state in the motion object detected by the motion object detector, a modification information adder for adding modification information to the image information in regard to the motion object detected by the motion object detector based on the moving state recognized by the recognizing device, and a display device for displaying the image information having been added with the modification information by the modification information adder.

Abstract: It is one object of the present invention to obtain a clear scaled image, without impairing the rough shape of fonts or the like, on a graphics screen that is handled by an information display device such as an LCD panel or a projector, and that includes a lot of stepped edges like thin lines.

Abstract: According to the present invention, an image processing apparatus includes an original image data input unit 11 for receiving the original low resolution image data; a connection detector 13 for detecting a connection of a target pixel in the original image data and neighboring pixels; a rule application unit 17 for employing a relationship between a coordinate position of a pixel in the original image data and a coordinate position of a resultant pixel in the expansion image data to define a plurality of types into which the relationship can be sorted, and for applying a specific rule for the plurality of types; and a results output unit 19 for determining the value of the resultant pixel in accordance with the rule, and for outputting the expansion image data, wherein, when the connection detector 13 ascertains that the target pixel constitutes a one-pixel width line, the rule application unit 17 applies a rule that will maintain the one-pixel width even in the expansion image data.

Abstract: To change the frequency of a video clock without adversely affecting a display quality. To lower the frequency of a video clock, following steps are executed, detecting an opportunity which causes the reduction of the frequency of the video clock; lowering the frequency of the video clock in a frequency range within which a circuit employing the video clock (for example, a PLL (Phase Lock Loop) circuit) can follow a change in the frequency; and iterating the step of lowering the frequency of the video clock until a predetermined frequency is attained. In addition, the following steps are also performed, detecting an opportunity which causes the reduction of the frequency of the video clock; lowering the frequency of the video clock to a predetermined frequency during a vertical blanking interval of a display device that employs the video clock; and maintaining the predetermined frequency of the video clock until change of the frequency is required.

Abstract: An overdrive controller for driving a liquid crystal display includes a change rate Rst calculating section for comprehending a transition state from a present brightness to a targeted brightness for each of R, G and B sub-pixels, a select section for selecting the sub-pixel with the slowest transition and the other sub-pixels from the comprehended transition states, and an overdrive voltage calculating section for calculating a voltage to accelerate a transition of brightness for the sub-pixel with the slowest transition. The overdrive controller further includes, an effective brightness Yst′ calculating section and Yst′ overdrive voltage calculating section for calculating a voltage to accelerate or to decelerate a transition of brightness for the other sub-pixels in order to coordination with each other, wherein the voltage is switched by a switch 23 to be supplied.

Abstract: A liquid crystal display drive circuit includes capacitance predicting section for predicting a capacitance value each pixel will reach at one refresh cycle later when applying a predetermined voltage for targeted brightness, a frame buffer for storing the predicted capacitance value, and overdrive voltage calculating section for calculating a voltage to be applied to each pixel based on targeted brightness at one refresh cycle later and the stored capacitance value in frame buffer.

Abstract: It is an object of the present invention to output a clear, expanded image wherein step-shapes or chain-shapes of oblique lines are reduced, distortion is eliminated and no constituent lines of fonts or graphics are missing.

Abstract: It is one object of the present invention to obtain a clear scaled image, without impairing the rough shape of fonts or the like, on a graphics screen that is handled by an information display device such as an LCD panel or a projector, and that includes a lot of stepped edges like thin lines.

Abstract: The object of the present invention is to balance power saving and useability in a computer system. According to a first aspect of the present invention, when predetermined activities of a device in a computer system, each of which occurs within a predetermined period t.sub.1 after the previous predetermined activity, succeed for a predetermined period t.sub.2 or longer, a substantial frequency of a central processing unit is raised. According to a second aspect of the present invention, a substantial frequency of the CPU is raised after a disk drive has been accessed, and if a predetermined activity performed by a device other than the disk drive occurs within a predetermined period t.sub.4 following the raise of the frequency, the substantial frequency of the CPU is lowered when a predetermined period t.sub.3, following the predetermined activity, has passed.

Abstract: A driver for driving a common electrode of a liquid crystal display panel comprises a first driver for driving the common electrode to hold a predetermined voltage every horizontal scan period, a charge hold capacitance having a capacity bigger than a capacity of the common electrode as a capacitance, an inductance for forming with the charge hold capacitance a resonance circuit, switch means for switching on the resonance circuit for a predetermined period when the voltage of the common electrode is changed, and a second driver for replacing last charge back into the charge hold capacitance. The driving by the first driver is reduced because of the charge hold capacitance. The second driver puts surplus charge into the charge hold capacitance so that the voltage of the common electrode can be rapidly charged to a desired voltage.

Abstract: To enable a computer system such that each local arbiter is supposed to output its own priority as the right to use the bus on a common arbitration bus through open-collector-type drivers to determine a winner in arbitration, to expand the bus by way of a channel different from bus signal lines. Certain representation features 73 and 79 having the functions of a local arbiter that represent the arbitration level of the other bus are provided in both a primary system and a secondary system linked via a channel in a signal transmission mode different from the signal transmission mode of the bus. Arbitration is first conducted on each of the buses of the primary and secondary system to determine winners in arbitration. Notification of the arbitration level of each winner is made through a channel to the representation feature on the other bus.

Abstract: To enable wired-OR signal lines to be connected without interlock in a bus linkage unit for connecting the bus of a computer system with the bus of an expansion device or the bus of another computer system through a signal transfer path in which the signal mode is different from those of the buses. A shadow register 46 that acts on the level of wired-OR signal line 51 of the other bus is provided in each system. The level of wired-OR signal lines in each system is sent to the shadow register of the other system through a communication path. When the shadow register of the system is at a predetermined level, said system will not send the level of said wired-OR signal line to the other system. Interlock is eliminated by avoiding repetition of level transfer echoes between both systems in this way. Both systems are further provided with a shadow-shadow register 47 for forming a mirror image of the shadow register of the other system.

Abstract: An antenna mounted on and retractable into a casing of a portable radio communication apparatus. When the antenna is pulled out of the casing, it plays the role of a .lambda./2 whip antenna. Even when the antenna is retracted into the casing, it has substantially the same gain as when pulled out from the casing.

Abstract: A computer having slots for attachment of expansion adapters contains means enabling the system formed by the computer and attached adapters to reconfigure automatically, when an adapter is either inserted into an empty slot or removed from an occupied slot, while the system is fully powered and in an application running state. Insertion of an adapter into an empty slot is detected by an adapter detection mechanism. The mechanism signals a programmed resource manager element in the computer, via an interrupt or the like, and the resource manager then sequences the computer and inserted adapter through a series of mechanical and electrical reconfiguring operations. In these operations, the adapter is physically locked into place relative to the slot, supplied with power from a source in the computer, and signal conduction paths through the slot are activated.

Abstract: A system for converting selected M gray levels in a K-gray scale to M identifiable levels in an N-gray scale, where K>N.gtoreq.M. A first table is created in which the respective M gray levels of the K-gray scale are mapped to different levels in the N-gray scale, which levels have the relative order and magnitude of their brightnesses in the K-gray scale, and using this first table, a second table is created in which the M gray levels in the N-gray scale are mapped to their corresponding M gray levels in the K-gray scale on a one-to-one basis according to the first table. Using the second table, any M gray levels in a K-gray scale can easily be converted to ones in an N-gray scale on a one-to-one basis with the relative order and magnitude of the brightnesses of those M gray levels being maintained.