Patents by Inventor Kazuo Sudou

Kazuo Sudou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6819189
    Abstract: A voltage-controlled oscillator includes a control terminal having a control voltage applied thereto, first and second output terminals, first and second ring oscillators, first and second output buffer circuits, and a latch circuit. The first and second ring oscillators include odd numbers of inverting amplifier circuits in series, a transfer gate circuit connected between the inverting amplifier circuits, and a resistor connected in parallel to the transfer gate circuit. The transfer gate circuit includes a transfer transistor connected between the inverting amplifier circuits, and has a transistor control terminal connected to the control terminal. The first and second output buffer circuits have inputs connected to the first and second ring oscillators, and outputs connected to the first and second output terminals. The latch circuit is connected to the first and second ring oscillators. The latch circuit controls the first and second ring oscillators to output complementary oscillation signals.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: November 16, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Kazuo Sudou, Hiroyuki Yamada
  • Publication number: 20030094978
    Abstract: A voltage-controlled oscillator comprises a control terminal applied to a control voltage, first and second output terminals, first and second ring oscillators, first and second output buffer circuits and a latch circuit. Each of the first and second ring oscillators includes an odd number of inverting amplifier circuits connected in series and a transfer gate circuit connected between the inverting amplifier circuits and a resistive element connected in parallel to the transfer transistor. The transfer gate circuit includes a transfer transistor connected between the inverting amplifier circuits. The transfer gate circuit has a control terminal connected to the control terminal. Each of the first and second output buffer circuits has an input connected to the first or second ring oscillator and an output connected to the first or second output terminal. The latch circuit is connected to the first and second ring oscillators.
    Type: Application
    Filed: November 14, 2002
    Publication date: May 22, 2003
    Inventors: Kazuo Sudou, Hiroyuki Yamada
  • Patent number: 6509803
    Abstract: A voltage-controlled oscillator comprises a control terminal applied to a control voltage, first and second output terminals, first and second ring oscillators, first and second output buffer circuits and a latch circuit. Each of the first and second ring oscillators includes an odd number of inverting amplifier circuits connected in series and a transfer gate circuit connected between the inverting amplifier circuits and a resistive element connected in parallel to the transfer transistor. The transfer gate circuit includes a transfer transistor connected between the inverting amplifier circuits. The transfer gate circuit has a control terminal connected to the control terminal. Each of the first and second output buffer circuits has an input connected to the first or second ring oscillator and an output connected to the first or second output terminal. The latch circuit is connected to the first and second ring oscillators.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: January 21, 2003
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Kazuo Sudou, Hiroyuki Yamada
  • Publication number: 20020027478
    Abstract: A voltage-controlled oscillator comprises a control terminal applied to a control voltage, first and second output terminals, first and second ring oscillators, first and second output buffer circuits and a latch circuit. Each of the first and second ring oscillators includes an odd number of inverting amplifier circuits connected in series and a transfer gate circuit connected between the inverting amplifier circuits and a resistive element connected in parallel to the transfer transistor. The transfer gate circuit includes a transfer transistor connected between the inverting amplifier circuits. The transfer gate circuit has a control terminal connected to the control terminal. Each of the first and second output buffer circuits has an input connected to the first or second ring oscillator and an output connected to the first or second output terminal. The latch circuit is connected to the first and second ring oscillators.
    Type: Application
    Filed: July 10, 2001
    Publication date: March 7, 2002
    Inventors: Kazuo Sudou, Hiroyuki Yamada