Abstract: A modulator according to the invention includes: a PLL circuit that detects a phase difference between an input signal and a reference signal, an AGC circuit that controls a gain of a modulating signal and outputs a control signal, and a voltage controlled oscillation circuit that controls an oscillation frequency of a signal outputted from the PLL circuit on the basis of the control signal. Here, the voltage controlled oscillation circuit includes: a first voltage controlled reactance unit that inputs the signal outputted from the PLL circuit, a second voltage controlled reactance unit that inputs the control signal, and a high-frequency oscillation circuit connected in parallel with the first and second voltage controlled reactance units, which outputs the input signal. Thereby, the invention achieves to provide a modulator capable of compensating the deviation of the modulation factor, even when the frequency of the carrier signal varies.

Abstract: A modulator according to the invention includes: a PLL circuit that detects a phase difference between an input signal and a reference signal, an AGC circuit that controls a gain of a modulating signal and outputs a control signal, and a voltage controlled oscillation circuit that controls an oscillation frequency of a signal outputted from the PLL circuit on the basis of the control signal. Here, the voltage controlled oscillation circuit includes: a first voltage controlled reactance unit that inputs the signal outputted from the PLL circuit, a second voltage controlled reactance unit that inputs the control signal, and a high-frequency oscillation circuit connected in parallel with the first and second voltage controlled reactance units, which outputs the input signal. Thereby, the invention achieves to provide a modulator capable of compensating the deviation of the modulation factor, even when the frequency of the carrier signal varies.

Abstract: A modulator according to the invention includes: a PLL circuit that detects a phase difference between an input signal and a reference signal, an AGC circuit that controls a gain of a modulating signal and outputs a control signal, and a voltage controlled oscillation circuit that controls an oscillation frequency of a signal outputted from the PLL circuit on the basis of the control signal. Here, the voltage controlled oscillation circuit includes: a first voltage controlled reactance unit that inputs the signal outputted from the PLL circuit, a second voltage controlled reactance unit that inputs the control signal, and a high-frequency oscillation circuit connected in parallel with the first and second voltage controlled reactance units, which outputs the input signal. Thereby, the invention achieves to provide a modulator capable of compensating the deviation of the modulation factor, even when the frequency of the carrier signal varies.

Abstract: A modulator according to the invention includes: a PLL circuit that detects a phase difference between an input signal and a reference signal, an AGC circuit that controls a gain of a modulating signal and outputs a control signal, and a voltage controlled oscillation circuit that controls an oscillation frequency of a signal outputted from the PLL circuit on the basis of the control signal. Here, the voltage controlled oscillation circuit includes: a first voltage controlled reactance unit that inputs the signal outputted from the PLL circuit, a second voltage controlled reactance unit that inputs the control signal, and a high-frequency oscillation circuit connected in parallel with the first and second voltage controlled reactance units, which outputs the input signal. Thereby, the invention achieves to provide a modulator capable of compensating the deviation of the modulation factor, even when the frequency of the carrier signal varies.

Abstract: A signal deciding apparatus which can obtain a stable digital signal OUT irrespective of an amplitude and a duty ratio of an input signal IN is provided. The input signal IN is amplified by inverters (51 to 53 and 8) and outputted as a digital signal OUT. A signal (S5) on the input side of the inverter (8) is integrated by a time constant which is equal to a data period of the input signal IN by an integrator (9) and supplied to a differential amplifier (20). A signal (S8) on the output side of the inverter (8) is integrated by a large time constant by an integrator (10), a control voltage VC supplied from a control terminal (13) is multiplexed to the integrated signal S8, and a resultant signal is sent to the differential amplifier (20). An output signal of the differential amplifier (20) is integrated by a resistor (11) and a capacitor (4) and its average level is fed back as a threshold voltage to the input side of the inverter (51) through a resistor (3) and multiplexed to the input signal IN.