Patents by Inventor Kazuo Takata
Kazuo Takata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240122309Abstract: Stop member for slide fastener includes: a main body having first and second surfaces; a first superficial region formed at a side of the first surface of the main body; and a slit or interface interposed between the first and second surfaces of the main body. The first superficial region extends over and covers the slit or interface, and has a thickness defined between the first surface and an end of the slit or interface at the side of the first surface.Type: ApplicationFiled: March 11, 2021Publication date: April 18, 2024Inventors: Tiantian Feng, Kazuo Tamura, Shintaro Metani, Atsushi Takata
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Patent number: 8288287Abstract: The invention provides an etching method for realizing trench etching without causing any damages to the side walls of the trench while maintaining a high-etching rate. The plasma etching method relates to forming a groove or a hole by forming a silicon trench to a silicon substrate or a silicon substrate having a silicon oxide dielectric layer via a mixed gas plasma containing a mixed gas of SF6 and O2 or a mixed gas of SF6, O2 and SiF4 and having added thereto a gas containing hydrogen within the range of 5 to 16% (percent concentration) of the total gas flow rate of the mixed gas.Type: GrantFiled: March 24, 2008Date of Patent: October 16, 2012Assignee: Hitachi High-Technologies CorporationInventors: Kazuo Takata, Yutaka Kudou, Satoshi Tani
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Patent number: 7642194Abstract: A method of etching for forming a groove in a SOI substrate includes a forming step, in which a mixed gas plasma is formed by using a mixed gas of a fluorinate gas and an oxygenic gas, and an applying step, in which a high-frequency bias is intermittently applied to the SOI substrate. In the applying step, the high-frequency bias is a temporally modulated high-frequency electricity. According to the method of etching, a yielding rate and a productivity can be improved.Type: GrantFiled: August 17, 2006Date of Patent: January 5, 2010Assignee: DENSO CORPORATIONInventors: Yuji Kato, Eiji Ishikawa, Yutaka Kudou, Satoshi Tani, Kazuo Takata
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Publication number: 20080176409Abstract: The invention provides an etching method for realizing trench etching without causing any damages to the side walls of the trench while maintaining a high-etching rate. The plasma etching method relates to forming a groove or a hole by forming a silicon trench to a silicon substrate or a silicon substrate having a silicon oxide dielectric layer via a mixed gas plasma containing a mixed gas of SF6 and O2 or a mixed gas of SF6, O2 and SiF4 and having added thereto a gas containing hydrogen within the range of 5 to 16% (percent concentration) of the total gas flow rate of the mixed gas.Type: ApplicationFiled: March 24, 2008Publication date: July 24, 2008Inventors: Kazuo TAKATA, Yutaka Kudou, Satoshi Tani
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Publication number: 20070080136Abstract: The invention provides an etching method for realizing trench etching without causing any damages to the side walls of the trench while maintaining a high-etching rate. The plasma etching method relates to forming a groove or a hole by forming a silicon trench to a silicon substrate or a silicon substrate having a silicon oxide dielectric layer via a mixed gas plasma containing a mixed gas of SF6 and O2 or a mixed gas of SF6, O2 and SiF4 and having added thereto a gas containing hydrogen within the range of 5 to 16% (percent concentration) of the total gas flow rate of the mixed gas.Type: ApplicationFiled: November 29, 2005Publication date: April 12, 2007Inventors: Kazuo Takata, Yutaka Kudou, Satoshi Tani
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Publication number: 20070048954Abstract: A method of etching for forming a groove in a SOI substrate includes a forming step, in which a mixed gas plasma is formed by using a mixed gas of a fluorinate gas and an oxygenic gas, and an applying step, in which a high-frequency bias is intermittently applied to the SOI substrate. In the applying step, the high-frequency bias is a temporally modulated high-frequency electricity. According to the method of etching, a yielding rate and a productivity can be improved.Type: ApplicationFiled: August 17, 2006Publication date: March 1, 2007Applicant: DENSO CORPORATIONInventors: Yuji Kato, Eiji Ishikawa, Yutaka Kudou, Satoshi Tani, Kazuo Takata
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Patent number: 6709984Abstract: A method for manufacturing a semiconductor device comprises etching a semiconductor substrate having an insulation film as mask using a mixed gas composed of HBr and CHF3, thereby having a reaction product composed of the semiconductor substrate and reaction gas to be adhered gradually on the side walls of the mask, and as a result creating a trench having a sufficient roundness formed to the upper end portion thereof.Type: GrantFiled: August 13, 2002Date of Patent: March 23, 2004Assignee: Hitachi High-Technologies CorporationInventors: Go Saito, Hiroaki Ishimura, Yutaka Kudoh, Masamichi Sakaguchi, Kazuo Takata
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Publication number: 20040048477Abstract: A method for manufacturing a semiconductor device comprises etching a semiconductor substrate having an insulation film as mask using a mixed gas composed of HBr and CHF3, thereby having a reaction product composed of the semiconductor substrate and reaction gas to be adhered gradually on the side walls of the mask, and as a result creating a trench having a sufficient roundness formed to the upper end portion thereof.Type: ApplicationFiled: September 10, 2003Publication date: March 11, 2004Inventors: Go Saito, Hiroaki Ishimura, Yutaka Kudoh, Masamichi Sakaguchi, Kazuo Takata
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Publication number: 20040033695Abstract: A method for manufacturing a semiconductor device comprises etching a semiconductor substrate having an insulation film as mask using a mixed gas composed of HBr and CHF3, thereby having a reaction product composed of the semiconductor substrate and reaction gas to be adhered gradually on the side walls of the mask, and as a result creating a trench having a sufficient roundness formed to the upper end portion thereof.Type: ApplicationFiled: August 13, 2002Publication date: February 19, 2004Inventors: Go Saito, Hiroaki Ishimura, Yutaka Kudoh, Masamichi Sakaguchi, Kazuo Takata
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Patent number: 6189127Abstract: A system for testing a bus is described. The system utilizes a tester which includes decompression circuitry to decompress digitized ADPCM signals transferred over a bus, data in the decompressed ADPCM signal is used to determine whether data losses or transmission errors are occurring on the bus. When such errors occur, the tester transmits a warning signal.Type: GrantFiled: November 2, 1998Date of Patent: February 13, 2001Assignees: Sony Corporation, Sony Trans Com, Inc.Inventors: Calvin Fang, Clayton Backhaus, Graham Harding, Kazuo Takata
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Patent number: 5907827Abstract: In an In-Flight Entertainment System (IFES), an audio distribution system transmits and synchronizes an audio data stream from multiple audio channels using the Adaptive Differential Pulse Code Modulation (ADPCM) technique for efficient transmission and preventing loss of synchronization. An encoder digitizes the analog audio signals, compresses the digital data, generates the synchronization parameters, including synchronization data for a selected channel, and creates a data frame to be transmitted to a number of decoders. Each decoder detects the synchronization header, extracts the compressed data patterns from the passenger selections, updates the ADPCM synchronization parameters, decompresses the compressed data patterns, and converts the digital audio data to analog audio signals to be delivered to the passenger seats.Type: GrantFiled: January 23, 1997Date of Patent: May 25, 1999Assignees: Sony Corporation, Sony Trans Com Inc.Inventors: Calvin Fang, Clayton Backhaus, Mike Densham, Daniel Lotocky, Kazuo Takata
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Patent number: 5796185Abstract: A system on an aircraft that eliminates hot-swapping of circuit boards to prevent damage to the circuit board connector interfaces. The system supplies power to a circuit card only when there is an effective coupling between a circuit card connector and an opposite mating connector. A power control circuit responds to a card present signal which indicates when the circuit card connector is coupled to the opposite mating connector. A logic circuit converts the card present signal to a power supply enable signal. A main power supply receives the power supply enable signal and provides power to the circuit card only when the circuit card connector and the opposite mating connector are appropriately coupled.Type: GrantFiled: October 15, 1996Date of Patent: August 18, 1998Assignees: Sony Corporation, Sony Trans Com Inc.Inventors: Kazuo Takata, James Bruce Whitehouse, Bruce Robert Ferguson
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Patent number: 5110408Abstract: The present invention relates to the etching of a gate film, a tungsten film, a silicon film, etc. In the present invention, use is made of an etching gas comprising a mixture composed of a reductive fluoride gas, a hydrocarbon gas and a halogen gas having a larger atomic diameter than a material to be etched, or a mixture composed of a reductive fluoride gas and a Cl-containing hydrocarbon gas, and the process comprises the step of conducting anisotropic etching of a material to be etched with an etching gas (a reductive fluoride gas), the step of forming a protective film by a depositing gas (a hydrocarbon gas), and the step of removing excess deposits formed as the protective film by means of a gas reactive with the protective film (a halogen gas or a Cl-containing hydrogen gas), wherein anisotropic etching is conducted by forming a protective film on a side wall while removing excess deposits formed as the protective film, thus enabling the anisotropic etching to be conducted with good accuracy.Type: GrantFiled: February 20, 1991Date of Patent: May 5, 1992Assignee: Hitachi, Ltd.Inventors: Takashi Fujii, Hironobu Kawahara, Kazuo Takata, Masaharu Nishiumi, Noriaki Yamamoto