Patents by Inventor Kazuo Tanada

Kazuo Tanada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9397780
    Abstract: A receiving device receiving a SC-FDMA signal includes a first calculating unit calculating a first channel estimation value indicating a propagation path state based on a sounding reference signal transmitted from a transmitting end device; a second calculating unit calculating a rank determination value and a modulation and coding scheme (MCS) determination value based on the first channel estimation value, the rank determination value and MCS determination value being associated with a transmission rank number and a transmission coding ratio/modulation scheme respectively, and used when the transmitting end device next transmits a data channel; a third calculating unit calculating a second channel estimation value indicating a propagation path state based on a demodulation reference signal by using interpolation processing in accordance with at least one of the rank determination value and the MCS determination value; and a demodulation/decoding unit acting on a data channel using the second channel estima
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: July 19, 2016
    Assignee: NEC CORPORATION
    Inventor: Kazuo Tanada
  • Publication number: 20150207588
    Abstract: A receiving device receiving a SC-FDMA signal includes a first calculating unit calculating a first channel estimation value indicating a propagation path state based on a sounding reference signal transmitted from a transmitting end device; a second calculating unit calculating a rank determination value and a modulation and coding scheme (MCS) determination value based on the first channel estimation value, the rank determination value and MCS determination value being associated with a transmission rank number and a transmission coding ratio/modulation scheme respectively, and used when the transmitting end device next transmits a data channel; a third calculating unit calculating a second channel estimation value indicating a propagation path state based on a demodulation reference signal by using interpolation processing in accordance with at least one of the rank determination value and the MCS determination value; and a demodulation/decoding unit acting on a data channel using the second channel estima
    Type: Application
    Filed: February 27, 2013
    Publication date: July 23, 2015
    Inventor: Kazuo Tanada
  • Patent number: 7502357
    Abstract: A radio communication system according to the present invention comprises a transmitter having a plurality of transmission antennas, and a receiver having a mechanism to perform a diversity reception. A plurality of multi-modulators of the transmitter allocates the same transmission data to a plurality of subcarriers, combines all transmission signals obtained by weighting each of the subcarriers, and outputs combined transmission signals. At least one of weight values for the same data is different between the multi-modulators in the weighting processing for each of the carriers.
    Type: Grant
    Filed: December 5, 2002
    Date of Patent: March 10, 2009
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuo Tanada, Hiroshi Kubo, Akihiro Okazaki
  • Publication number: 20070115910
    Abstract: A radio communication system according to the present invention comprises a transmitter having a plurality of transmission antennas, and a receiver having a mechanism to perform a diversity reception. A plurality of multi-modulators of the transmitter allocates the same transmission data to a plurality of subcarriers, combines all transmission signals obtained by weighting each of the subcarriers, and outputs combined transmission signals. At least one of weight values for the same data is different between the multi-modulators in the weighting processing for each of the carriers.
    Type: Application
    Filed: January 19, 2007
    Publication date: May 24, 2007
    Inventors: Kazuo Tanada, Hiroshi Kubo, Akihiro Okazaki
  • Patent number: 7139333
    Abstract: A sampling unit that sequentially samples a received signal. A plurality of demodulation processing units set in advance with frequency correction values of mutually different sizes, and that correct frequencies of the sampled signals according to the frequency correction values, demodulate the sampled signals after the frequency correction, and output decision values and reliability information of the received signal, and detect known synchronization words that have been inserted into the received signal from the decision value. A decision value selecting unit selects one final decision value from a plurality of decision values based on a plurality of pieces of reliability information that have been output from the demodulation processing units and a result of the detection of the synchronization word. And, a frequency error detecting unit estimates a frequency error of the received signal based on a frequency correction value of the demodulation processing unit corresponding to the final decision value.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: November 21, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuo Tanada, Hiroshi Kubo, Takeshi Uraguchi
  • Patent number: 6996196
    Abstract: In a sequence estimation method and a sequence estimator of the present invention, a metric is calculated using a received signal and its estimated value, also another metric is calculated using a filtering result via a matching filter, one of these metrics is selected based on a characteristic of the channel or these metrics are combined, when a transmitted signal sequence transmitted from a transmission side is estimated based on a characteristic of a received signal and a channel using a list output Viterbi algorithm for deciding one or a plurality of survivors for each state of the Viterbi algorithm including one or more states. The operation speed and the characteristic of a channel can be improved using the smallest circuit scale even if the characteristic of a channel has a long delay time, in a sequence estimation method and a sequence estimator.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: February 7, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroshi Kubo, Kazuo Tanada, Keishi Murakami
  • Publication number: 20040246916
    Abstract: A radio communication system according to the present invention comprises a transmitter having a plurality of transmission antennas, and a receiver having a mechanism to perform a diversity reception. A plurality of multi-modulators of the transmitter allocates the same transmission data to a plurality of subcarriers, combines all transmission signals obtained by weighting each of the subcarriers, and outputs combined transmission signals. At least one of weight values for the same data is different between the multi-modulators in the weighting processing for each of the carriers.
    Type: Application
    Filed: September 29, 2003
    Publication date: December 9, 2004
    Inventors: Kazuo Tanada, Hiroshi Kubo, Akihiro Okazaki
  • Publication number: 20040037262
    Abstract: In a mobile communication system of the present invention, a multicarrier CDMA receiving apparatus corrects soft decision data by using an amplitude component of a channel estimate value, thereafter carries out a turbo decoding, selects an encoding rate based on reliability information for the decoded data, and notifies a transmitting apparatus of the encoding rate through an up link. The multicarrier CDMA transmitting apparatus carries out an encoding processing by using the notified encoding rate.
    Type: Application
    Filed: June 19, 2003
    Publication date: February 26, 2004
    Inventor: Kazuo Tanada
  • Patent number: 6674814
    Abstract: A frequency error estimating apparatus for estimating a frequency error between a local oscillation frequency and a carrier frequency of a received signal in a receiver includes a frequency error estimating unit (11) that suppresses a noise component included in the received signal according to a filter coefficient input to an averaging filter (23), and estimates a frequency error based on an output of the filter; and a filter coefficient determining unit (12) that calculates a filter coefficient based on a differential of estimate values of the frequency error from a first symbol, and changes the characteristics of the filter. In the receiver, the frequency error estimating apparatus can secure high precision in estimating a frequency error without losing the level of following the time variation in the Doppler frequency.
    Type: Grant
    Filed: March 6, 2001
    Date of Patent: January 6, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Kazuo Tanada
  • Publication number: 20030103588
    Abstract: A frequency error estimating receiver comprising sampling means for sampling the received signal sequentially, a plurality of decoding means for which different frequency correction values are preset and which corrects the frequency of each sample of the received signal according to the frequency correction values, demodulates each sample after the frequency correction, outputs the judgment
    Type: Application
    Filed: November 14, 2002
    Publication date: June 5, 2003
    Inventors: Kazuo Tanada, Hiroshi Kubo, Takeshi Uraguchi
  • Publication number: 20030081702
    Abstract: In a sequence estimation method and a sequence estimator of the present invention, a metric is calculated using a received signal and its estimated value, also another metric is calculated using a filtering result via a matching filter, one of these metrics is selected based on a characteristic of the channel or these metrics are combined, when a transmitted signal sequence transmitted from a transmission side is estimated based on a characteristic of a received signal and a channel using a list output Viterbi algorithm for deciding one or a plurality of survivors for each state of the Viterbi algorithm including one or more states. The operation speed and the characteristic of a channel can be improved using the smallest circuit scale even if the characteristic of a channel has a long delay time, in a sequence estimation method and a sequence estimator.
    Type: Application
    Filed: December 10, 2002
    Publication date: May 1, 2003
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroshi Kubo, Kazuo Tanada, Keishi Murakami
  • Patent number: 6556632
    Abstract: In a sequence estimation method and a sequence estimator of the present invention, a metric is calculated using a received signal and its estimated value, also another metric is calculated using a filtering result via a matching filter, one of these metrics is selected based on a characteristic of the channel or these metrics are combined, when a transmitted signal sequence transmitted from a transmission side is estimated based on a characteristic of a received signal and a channel using a list output Viterbi algorithm for deciding one or a plurality of survivors for each state of the Viterbi algorithm including one or more states. The operation speed and the characteristic of a channel can be improved using the smallest circuit scale even if the characteristic of a channel has a long delay time, in a sequence estimation method and a sequence estimator.
    Type: Grant
    Filed: May 22, 1998
    Date of Patent: April 29, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroshi Kubo, Kazuo Tanada, Keishi Murakami
  • Publication number: 20010008543
    Abstract: A frequency error estimating apparatus for estimating a frequency error between a local oscillation frequency and a carrier frequency of a received signal in a receiver includes a frequency error estimating unit (11) that suppresses a noise component included in the received signal according to a filter coefficient input to an averaging filter (23), and estimates a frequency error based on an output of the filter; and a filter coefficient determining unit (12) that calculates a filter coefficient based on a differential of estimate values of the frequency error from a first symbol, and changes the characteristics of the filter. In the receiver, the frequency error estimating apparatus can secure high precision in estimating a frequency error without losing the level of following the time variation in the Doppler frequency.
    Type: Application
    Filed: March 6, 2001
    Publication date: July 19, 2001
    Inventor: Kazuo Tanada
  • Patent number: 6219388
    Abstract: A digital data demodulating device that estimates the channel impulse response (CIR) based on a received signal, and performs a viterbi algorithm using the replica generated according to the estimated CIR, and the received signal. The digital data demodulating device of the present invention follows the time variation of the channel by sequentially estimating the CIR in the CIR estimating circuit. The replica generating circuit of the digital data demodulating device includes a device for storing the estimated CIR and replica for each block therein, for reading the estimated CIR at a specific timing and updating the replica. A digital data demodulating device which reduce circuit scale, operates in a high speed, and appropriately follows the time variation of the channel, even in a high bit transmission rate and in a high delay dispersion of the multipass wave contained in the received signal.
    Type: Grant
    Filed: January 15, 1998
    Date of Patent: April 17, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuo Tanada, Hiroshi Kubo, Keishi Murakami