Patents by Inventor Kazuo Tsutsui
Kazuo Tsutsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11652150Abstract: Provided are a charge trap evaluation method and semiconductor device including, in an embodiment, a step for applying an initialization voltage that has the same sign as a threshold voltage and is greater than or equal to the threshold voltage between the source electrode 15 and drain electrode 16 of a semiconductor device 1 having an HEMT structure and the substrate 10 of the semiconductor device 1 and initializing a trap state by forcing out trapped charge from a trap level and a step for monitoring the current flowing between the source electrode 15 and drain electrode 16 after the trap state initialization and evaluating at least one from among charge trapping, current collapse, and charge release.Type: GrantFiled: August 6, 2018Date of Patent: May 16, 2023Assignee: SUMITOMO CHEMICAL COMPANY, LIMITEDInventors: Kuniyuki Kakushima, Takuya Hoshii, Hitoshi Wakabayashi, Kazuo Tsutsui, Hiroshi Iwai, Taiki Yamamoto
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Patent number: 11513149Abstract: One embodiment of the present invention provides a method for evaluating the electrical defect density of a semiconductor layer, which comprises: a step for measuring an electric current by applying a voltage to a semiconductor element 1 which comprises a GaN layer 12 that serves as a semiconductor layer; and a step for deriving the electrical defect density in the GaN layer 12 with use of the measured electric current value.Type: GrantFiled: August 6, 2018Date of Patent: November 29, 2022Assignee: SUMITOMO CHEMICAL COMPANY, LIMITEDInventors: Kuniyuki Kakushima, Takuya Hoshii, Hitoshi Wakabayashi, Kazuo Tsutsui, Hiroshi Iwai, Taiki Yamamoto
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Patent number: 10964836Abstract: According to one embodiment, a photon counting-type radiation detector includes a first cell and a second cell. The first cell transmits radiation. The second cell is stacked with the first cell. The second cell absorbs the radiation passing through the first cell.Type: GrantFiled: October 11, 2019Date of Patent: March 30, 2021Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTDInventors: Kuniyuki Kakushima, Tomoyuki Suzuki, Kazuo Tsutsui, Akito Sasaki, Atsuya Sasaki, Hideaki Hirabayashi, Yoshinori Kataoka
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Publication number: 20200225276Abstract: One embodiment of the present invention provides a method for evaluating the electrical defect density of a semiconductor layer, which comprises: a step for measuring an electric current by applying a voltage to a semiconductor element 1 which comprises a GaN layer 12 that serves as a semiconductor layer; and a step for deriving the electrical defect density in the GaN layer 12 with use of the measured electric current value.Type: ApplicationFiled: August 6, 2018Publication date: July 16, 2020Applicant: SUMITOMO CHEMICAL COMPANY, LIMITEDInventors: Kuniyuki KAKUSHIMA, Takuya HOSHII, Hitoshi WAKABAYASHI, Kazuo TSUTSUI, Hiroshi IWAI, Taiki YAMAMOTO
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Publication number: 20200203493Abstract: Provided are a charge trap evaluation method and semiconductor device including, in an embodiment, a step for applying an initialization voltage that has the same sign as a threshold voltage and is greater than or equal to the threshold voltage between the source electrode 15 and drain electrode 16 of a semiconductor device 1 having an HEMT structure and the substrate 10 of the semiconductor device 1 and initializing a trap state by forcing out trapped charge from a trap level and a step for monitoring the current flowing between the source electrode 15 and drain electrode 16 after the trap state initialization and evaluating at least one from among charge trapping, current collapse, and charge release.Type: ApplicationFiled: August 6, 2018Publication date: June 25, 2020Applicant: SUMITOMO CHEMICAL COMPANY, LIMITEDInventors: Kuniyuki KAKUSHIMA, Takuya HOSHII, Hitoshi WAKABAYASHI, Kazuo TSUTSUI, Hiroshi IWAI, Taiki YAMAMOTO
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Publication number: 20200041663Abstract: According to one embodiment, a photon counting-type radiation detector includes a first cell and a second cell. The first cell transmits radiation. The second cell is stacked with the first cell. The second cell absorbs the radiation passing through the first cell.Type: ApplicationFiled: October 11, 2019Publication date: February 6, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTDInventors: Kuniyuki KAKUSHIMA, Tomoyuki SUZUKI, Kazuo TSUTSUI, Akito SASAKI, Atsuya SASAKI, Hideaki HIRABAYASHI, Yoshinori KATAOKA
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Patent number: 9343536Abstract: A semiconductor device according to an embodiment includes a first semiconductor layer, a second semiconductor layer provided on the first semiconductor layer and having a wider band gap than the first semiconductor layer, a source electrode and a drain electrode provided on the second semiconductor layer, wherein at least one of the source electrode and the drain electrode includes a plurality of protrusions on a side in contact with the second semiconductor layer, and a gate electrode provided between the source electrode and the drain electrode.Type: GrantFiled: February 13, 2015Date of Patent: May 17, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Kazuo Tsutsui, Hiroshi Iwai, Kuniyuki Kakushima, Hitoshi Wakabayashi
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Publication number: 20160043187Abstract: A semiconductor device according to an embodiment includes a first semiconductor layer, a second semiconductor layer provided on the first semiconductor layer and having a wider band gap than the first semiconductor layer, a source electrode and a drain electrode provided on the second semiconductor layer, wherein at least one of the source electrode and the drain electrode includes a plurality of protrusions on a side in contact with the second semiconductor layer, and a gate electrode provided between the source electrode and the drain electrode.Type: ApplicationFiled: February 13, 2015Publication date: February 11, 2016Inventors: Wataru Saito, Kazuo Tsutsui, Hiroshi Iwai, Kuniyuki Kakushima, Hitoshi Wakabayashi
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Patent number: 7800181Abstract: A gate electrode is formed on a semiconductor substrate containing silicon, then source/drain regions are formed in regions of the semiconductor substrate located to both sides of the gate electrode, and then a nickel alloy silicide layer is formed on at least either the gate electrode or the source/drain regions. In the step of forming the nickel alloy silicide layer, a nickel alloy film and a nickel film are sequentially deposited on the semiconductor substrate and thereafter subjected to heat treatment.Type: GrantFiled: October 18, 2006Date of Patent: September 21, 2010Assignee: Panasonic CorporationInventors: Yasutoshi Okuno, Michikazu Matsumoto, Masafumi Kubota, Seiji Ueda, Hiroshi Iwai, Kazuo Tsutsui, Kuniyuki Kakushima
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Publication number: 20090057739Abstract: The Ge channel device comprises: a Ge channel layer (2); a Si-containing interface layer (4) formed on the Ge channel layer (2); a La2O3 layer (6) formed on the interface layer (4); and an electrically conductive layer (8) formed on the La2O3 layer (6). In this device, the Si-containing interface layer (4) functions to suppress the diffusion of Ge atoms into the La2O3 layer (6) and thereby prevents the formation of Ge oxide in the La2O3 layer (6); accordingly, a Ge channel device whose C-V characteristic exhibits only a small hysteresis can be achieved.Type: ApplicationFiled: August 28, 2008Publication date: March 5, 2009Applicant: Tokyo Institute of TechnologyInventors: Hiroshi Iwai, Takeo Hattori, Kazuo Tsutsui, Kuniyuki Kakushima, Parhat Ahmet, Jaeyeol Song, Masaki Yoshimaru, Yasuyoshi Mishima, Tomonori Aoyama, Hiroshi Oji, Yoshitake Kato
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Publication number: 20070093047Abstract: A gate electrode is formed on a semiconductor substrate containing silicon, then source/drain regions are formed in regions of the semiconductor substrate located to both sides of the gate electrode, and then a nickel alloy silicide layer is formed on at least either the gate electrode or the source/drain regions. In the step of forming the nickel alloy silicide layer, a nickel alloy film and a nickel film are sequentially deposited on the semiconductor substrate and thereafter subjected to heat treatment.Type: ApplicationFiled: October 18, 2006Publication date: April 26, 2007Inventors: Yasutoshi Okuno, Michikazu Matsumoto, Masafumi Kubota, Seiji Ueda, Hiroshi Iwai, Kazuo Tsutsui, Kuniyuki Kakushima
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Patent number: 6728730Abstract: A figure management system in which plural kinds of figures concerning the same part to be managed are modified. The figure management system includes a figure DB for storing data of figures including topological figures, an attribute DB for storing object attribute data, input and output devices, and a computer for managing figure and object attribute data. An ID code common to features indicating the same object is assigned. On input of a new figure, feature-attribute matching is performed between a feature having no ID code on the new figure and existent object attribute data. If any inconsistency is found the feature is indicated as a discrepant feature or a renewed feature.Type: GrantFiled: August 8, 2000Date of Patent: April 27, 2004Assignee: Hitachi, Ltd.Inventors: Keiro Muro, Nobuhiro Ishimaru, Kazuaki Iwamura, Kazuo Tsutsui
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Patent number: 6505186Abstract: The present invention offers a feature data management method which provides data indicating created time and destroyed time of geographic object for feature data, thereby increasing the speed and facilitating a search in time direction. By this method, for example, if the building C is built at time Ts and destroyed at time Te, created time Ts and destroyed time Te of geographic object C are registered in the feature data, whereby it can be managed by a database that the geographic object C existed only between times Ts and Te.Type: GrantFiled: April 26, 1999Date of Patent: January 7, 2003Assignee: Hitachi, Ltd.Inventors: Keiro Muro, Kazuaki Iwamura, Yasuei Nomoto, Kazuo Tsutsui
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Patent number: 6101165Abstract: A recording surface of a disk-shaped record medium is scanned by respective proves of a planar apertured probe array including a plurality of apertured probes arranged in a two-dimensional manner such that the recording surface of the record medium is scanned along a plurality of parallel scanning tracks whose pitch is smaller than a half of a data track pitch. Evanescent light generated by respective probes is interacted with the recording surface to produce scattered light whose intensity is modulated in accordance with the recorded data. The scattered light is received by a plurality of light receiving elements to generate electric signals, and these electric signals are once stored in a storage device. These electric signals are processed to select valid data, and desired data is extracted from the valid data.Type: GrantFiled: July 2, 1998Date of Patent: August 8, 2000Assignee: Tokyo Institute of TechnologyInventors: Motonobu Korogi, Kazuo Tsutsui, Motoichi Otsu
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Patent number: 5454073Abstract: A drawing management device for managing the drawing of an entire facility, such as a water supply facility, as digital information. This device includes a unit for storing drawings with priorities obtained by separating the entire facility drawing into sub-facility drawings located at plural levels, a selective display designating unit for displaying a desired sub-facility drawing obtained by selecting the number of levels considering the priority from the storing unit, and a display unit for displaying the desired sub-facility drawing in response to the signal from the selective display designating unit. By suitably selecting a desired level considering the priority, only a necessary and sufficient facility drawing can be displayed swiftly.Type: GrantFiled: November 29, 1991Date of Patent: September 26, 1995Assignee: Hitachi, Ltd.Inventors: Manabu Fukushima, Mikio Yoda, Kazuo Tsutsui
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Patent number: RE42414Abstract: A drawing management device for managing the drawing of an entire facility, such as a water supply facility, as digital information. This device includes a unit for storing drawings with priorities obtained by separating the entire facility drawing into sub-facility drawings located at plural levels, a selective display designating unit for displaying a desired sub-facility drawing obtained by selecting the number of levels considering the priority from the storing unit, and a display unit for displaying the desired sub-facility drawing in response to the signal from the selective display designating unit. By suitably selecting a desired level considering the priority, only a necessary and sufficient facility drawing can be displayed swiftly.Type: GrantFiled: September 25, 1997Date of Patent: May 31, 2011Assignee: Hitachi, Ltd.Inventors: Manabu Fukushima, Mikio Yoda, Kazuo Tsutsui