Patents by Inventor Kazuomi Wakimoto

Kazuomi Wakimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor storage device having redundancy area
    Patent number: 8072827
    Abstract: A semiconductor storage device is provided with: a memory cell array which includes a normal area and a redundancy area which replaces a defective memory cell in the normal area; a normal area refresh circuit which performs a CBR refresh operation of a memory cell which is connected to a word line in the normal area; and a redundancy area refresh circuit which performs a CBR refresh operation of a memory cell which is connected to a word line in the redundancy area in parallel with the CBR refresh operation of the memory cell in the normal area.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: December 6, 2011
    Assignee: Elpida Memory, Inc.
    Inventor: Kazuomi Wakimoto
  • Semiconductor storage device having redundancy area
    Publication number: 20090161457
    Abstract: A semiconductor storage device is provided with: a memory cell array which includes a normal area and a redundancy area which replaces a defective memory cell in the normal area; a normal area refresh circuit which performs a CBR refresh operation of a memory cell which is connected to a word line in the normal area; and a redundancy area refresh circuit which performs a CBR refresh operation of a memory cell which is connected to a word line in the redundancy area in parallel with the CBR refresh operation of the memory cell in the normal area.
    Type: Application
    Filed: December 11, 2008
    Publication date: June 25, 2009
    Applicant: Elpida Memory, Inc.
    Inventor: Kazuomi Wakimoto