Patents by Inventor Kazushige Iwamoto
Kazushige Iwamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9935093Abstract: A semiconductor device includes a voltage generation circuit configured to generate a specific voltage; a first terminal configured to output the specific voltage; a second terminal configured to receive a temperature sensitive voltage; an analog/digital conversion circuit configured to convert the specific voltage and the temperature sensitive voltage to digital values; a storage unit configured to store the specific voltage and the temperature sensitive voltage; and a third terminal configured to transmit the specific voltage and the temperature sensitive voltage to an external semiconductor device.Type: GrantFiled: July 24, 2015Date of Patent: April 3, 2018Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Kazushige Iwamoto
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Publication number: 20160035713Abstract: A semiconductor device includes a voltage generation circuit configured to generate a specific voltage; a first terminal configured to output the specific voltage; a second terminal configured to receive a temperature sensitive voltage; an analog/digital conversion circuit configured to convert the specific voltage and the temperature sensitive voltage to digital values; a storage unit configured to store the specific voltage and the temperature sensitive voltage; and a third terminal configured to transmit the specific voltage and the temperature sensitive voltage to an external semiconductor device.Type: ApplicationFiled: July 24, 2015Publication date: February 4, 2016Inventor: Kazushige IWAMOTO
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Patent number: 8421161Abstract: A semiconductor device has a semiconductor substrate in which first and second wells are formed. The substrate and wells are of the same conductivity type, but the second well has a higher impurity concentration than the first well. High-voltage MOS transistors are formed in the first well, and a low-voltage MOS transistor is formed in the second well. The high-voltage MOS transistors include a first transistor having a gate oxide layer with a first thickness and a second transistor having a gate oxide layer with a second thickness less than the first thickness. The low-voltage MOS transistor has a third gate oxide layer with a third thickness less than the first thickness. The second high-voltage MOS transistor provides efficient current conduction.Type: GrantFiled: January 26, 2010Date of Patent: April 16, 2013Assignee: Lapis Semiconductor Co., Ltd.Inventor: Kazushige Iwamoto
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Publication number: 20100187639Abstract: A semiconductor device has a semiconductor substrate in which first and second wells are formed. The substrate and wells are of the same conductivity type, but the second well has a higher impurity concentration than the first well. High-voltage MOS transistors are formed in the first well, and a low-voltage MOS transistor is formed in the second well. The high-voltage MOS transistors include a first transistor having a gate oxide layer with a first thickness and a second transistor having a gate oxide layer with a second thickness less than the first thickness. The low-voltage MOS transistor has a third gate oxide layer with a third thickness less than the first thickness. The second high-voltage MOS transistor provides efficient current conduction.Type: ApplicationFiled: January 26, 2010Publication date: July 29, 2010Applicant: OKI SEMICONDUCTOR CO., LTD.Inventor: Kazushige Iwamoto
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Patent number: 5538771Abstract: There is disclosed a semiconductor wafer-securing adhesive tape having a radiation-curable adhesive layer on one surface of a support film, wherein the support film is composed of a laminated film that comprises, as a center layer, a film comprising a styrene/ethylene/butene/styrene block copolymer, a ethylene/acrylic acid-type copolymer, and a polyamide/polyether copolymer in a specific ratio, and has a layer for adhesive coating laid, directly or through a bonding layer, on one surface of the center layer on the side where said radiation-curable adhesive layer is provided, and has a transfer-preventing layer laid, directly or through a bonding layer, on the other surface of the center layer. There is also disclosed a semiconductor wafer-securing adhesive tape wherein the center layer of said semiconductor wafer-securing adhesive tape has a film comprising said SEBS block copolymer or SEPS block copolymer, an amorphous poly .alpha.-olefin, and a polyamide/polyether copolymer, in a specific ratio.Type: GrantFiled: August 17, 1993Date of Patent: July 23, 1996Assignee: Furukawa Electric Co., Ltd.Inventors: Koji Nakayama, Kenji Mougi, Eiji Shiramatsu, Kazushige Iwamoto, Shinichi Ishiwata, Morikuni Hasebe
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Patent number: 5300172Abstract: There is disclosed a surface-protection method during chemical etching of a plate material, which comprises sticking a radiation-curable adhesive tape onto the area of plate material where etching should not be effected, and after the radiation-curable adhesive layer is cured with irradiation of radiation, subjecting said plate material to a chemical etching treatment.Type: GrantFiled: October 29, 1992Date of Patent: April 5, 1994Assignee: The Furukawa Electric Co., Ltd.Inventors: Shinichi Ishiwata, Kazushige Iwamoto, Michio Ueyama, Isamu Noguchi
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Patent number: 5281473Abstract: There is provided a radiation-curable adhesive tape comprising a radiation-curable adhesive layer which is formed on a radiation transmitting-substrate. The radiation-curable adhesive layer is composed of an acrylic adhesive and radiation-curable compound having carbon-carbon double bonds. The radiation-curable tape can be used preferably in processing steps for the production of semiconductor wafer, ceramics and glass employing a direct picking-up system.Type: GrantFiled: February 25, 1992Date of Patent: January 25, 1994Assignee: Furakawa Electric Co., Ltd.Inventors: Shinichi Ishiwata, Michio Ueyama, Hiroyuki Nakae, Yoshiyuki Funayama, Kazushige Iwamoto, Isamu Noguchi
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Patent number: 5149586Abstract: There is a radiation-curable adhesive tape comprising a radiation-curable adhesive layer which is formed on a radiation transmitting-substrate. The radiation-curable adhesive layer is composed of an acrylic adhesive and radiation-curable compound having carbon-carbon double bonds. The radiation-curable tape can be used preferably in processing steps for the production of semiconductor wafer, ceramics and glass employing a direct picking-up system.Type: GrantFiled: December 21, 1990Date of Patent: September 22, 1992Assignee: Furukawa Electric Co., Ltd.Inventors: Shinichi Ishiwata, Michio Ueyama, Hiroyuki Nakae, Yoshiyuki Funayama, Kazushige Iwamoto, Isamu Noguchi
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Patent number: 4999242Abstract: There is provided a radiation-curable adhesive tape comprising a radiation-curable adhesive layer which is formed on a radiation transmitting substrate. The radiation-curable adhesive layer is composed of an acrylic adhesive and radiation-curable compound having carbon-carbon double bonds. The radiation-curable tape can be used preferably in processing steps for the production of semiconductor wafer, ceramics and glass employing a direct picking-up system.Type: GrantFiled: July 7, 1988Date of Patent: March 12, 1991Assignee: Furukawa Electric Co., Ltd.Inventors: Shinichi Ishiwata, Michio Ueyama, Hiroyuki Nakae, Yoshiyuki Funayama, Kazushige Iwamoto, Isamu Noguchi