Patents by Inventor Kazushige Nagamatsu

Kazushige Nagamatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9075719
    Abstract: A storage system is migrated without stopping service provision by a host computer. By this means, in a migration-source storage system, data of the cache memory is destaged, and, next, data received from the host computer is directly written in a logical unit by bypassing the cache memory. On the other hand, in a migration-destination storage system, communication with the migration-source storage system is performed to set setting information of a logical unit of the migration object into a logical unit management table and set a writing mode for the cache memory to a cache-bypass mode. After that, the migration-source storage system blocks a path to the host computer. The migration-destination storage system receives a report of the path block from the migration-source storage system and then opens a path between the own system and the host computer.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: July 7, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Mika Teranishi, Hiroji Shibuya, Shunji Murayama, Toshio Kimura, Kazushige Nagamatsu
  • Patent number: 8874965
    Abstract: The present invention enables program codes to be shared among processors 211. To prevent the debug operation of one processor 211 from affecting the debug operation of the other processors 211, when detecting a breakpoint during execution of a program code, a debugger 410 or a debugger stub 520 controls the execution of the program code while exchanging breakpoint information 800 with the other debuggers 410 or the other debugger stubs 520. Furthermore, a circuit 170 is created which prevents the program code being carelessly rewritten due to thermal runaway, a bug, and the like of a processor 211, and the protection setting by the protection logic 71 in the circuit 170 is released only in case the processor 211 accesses each of a plurality of registers from 65 to 67 in specified order.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: October 28, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Toshio Kimura, Jun Kitahara, Hiroji Shibuya, Kazushige Nagamatsu, Nakaba Sato, Mika Teranishi
  • Publication number: 20130212335
    Abstract: A storage system is migrated without stopping service provision by a host computer. By this means, in a migration-source storage system, data of the cache memory is destaged, and, next, data received from the host computer is directly written in a logical unit by bypassing the cache memory. On the other hand, in a migration-destination storage system, communication with the migration-source storage system is performed to set setting information of a logical unit of the migration object into a logical unit management table and set a writing mode for the cache memory to a cache-bypass mode. After that, the migration-source storage system blocks a path to the host computer. The migration-destination storage system receives a report of the path block from the migration-source storage system and then opens a path between the own system and the host computer.
    Type: Application
    Filed: February 10, 2012
    Publication date: August 15, 2013
    Inventors: Mika Teranishi, Hiroji Shibuya, Shunji Murayama, Toshio Kimura, Kazushige Nagamatsu
  • Publication number: 20130111270
    Abstract: The present invention enables program codes to be shared among processors 211. To prevent the debug operation of one processor 211 from affecting the debug operation of the other processors 211, when detecting a breakpoint during execution of a program code, a debugger 410 or a debugger stub 520 controls the execution of the program code while exchanging breakpoint information 800 with the other debuggers 410 or the other debugger stubs 520. Furthermore, a circuit 170 is created which prevents the program code being carelessly rewritten due to thermal runaway, a bug, and the like of a processor 211, and the protection setting by the protection logic 71 in the circuit 170 is released only in case the processor 211 accesses each of a plurality of registers from 65 to 67 in specified order.
    Type: Application
    Filed: October 26, 2011
    Publication date: May 2, 2013
    Applicant: HITACHI, LTD.
    Inventors: Toshio Kimura, Jun Kitahara, Hiroji Shibuya, Kazushige Nagamatsu, Nakaba Sato, Mika Teranishi
  • Patent number: 8220000
    Abstract: A storage system including a plurality of logical units; file management application software for performing file management on a per-file basis for a plurality of files stored in the respective logical units; a load monitoring module for monitoring a load in a resource of the storage system; and a file management control module for controlling the file management application software based on the load monitored by the load monitoring module.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: July 10, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Kazushige Nagamatsu, Hiroji Shibuya
  • Publication number: 20110264619
    Abstract: A storage system including a plurality of logical units; file management application software for performing file management on a per-file basis for a plurality of files stored in the respective logical units; a load monitoring module for monitoring a load in a resource of the storage system; and a file management control module for controlling the file management application software based on the load monitored by the load monitoring module.
    Type: Application
    Filed: July 1, 2011
    Publication date: October 27, 2011
    Inventors: Kazushige NAGAMATSU, Hiroji Shibuya
  • Patent number: 7987466
    Abstract: A storage system including a plurality of logical units; file management application software for performing file management on a per-file basis for a plurality of files stored in the respective logical units; a load monitoring module for monitoring a load in a resource of the storage system; and a file management control module for controlling the file management application software based on the load monitored by the load monitoring module.
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: July 26, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Kazushige Nagamatsu, Hiroji Shibuya
  • Publication number: 20070043737
    Abstract: A storage system including a plurality of logical units; file management application software for performing file management on a per-file basis for a plurality of files stored in the respective logical units; a load monitoring module for monitoring a load in a resource of the storage system; and a file management control module for controlling the file management application software based on the load monitored by the load monitoring module.
    Type: Application
    Filed: November 4, 2005
    Publication date: February 22, 2007
    Inventors: Kazushige Nagamatsu, Hiroji Shibuya