Patents by Inventor Kazushige Takechi

Kazushige Takechi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240215315
    Abstract: A thin-film transistor includes a gate electrode and a layered oxide region between a substrate and the gate electrode. The layered oxide region includes a first oxide layer and a second oxide layer. A channel region includes a first region of the first oxide layer, and a source/drain region includes a second region of the first oxide layer and a first region of the second oxide layer laid one above the other. The mobility of the first oxide layer is greater than the mobility of the second oxide layer. The distance between a peak position in a concentration profile of a first impurity atoms in a layering direction and a top face of the first region of the second oxide layer is shorter than the distance between the peak position and a top face of the second region of the first oxide layer.
    Type: Application
    Filed: December 6, 2023
    Publication date: June 27, 2024
    Inventors: Jun TANAKA, Kazushige TAKECHI
  • Publication number: 20240178232
    Abstract: A thin-film transistor substrate includes a first insulating film, a second insulating film located upper than the first insulating film, a first thin-film transistor, a second thin-film transistor, and a capacitive element. The first thin-film transistor includes a top-gate electrode and a first semiconductor region located above the first insulating film. The second thin-film transistor includes a second semiconductor region located above the second insulating film. The capacitive element includes at least a part of the top-gate electrode and a first low-resistive semiconductor region of the same semiconductor layer that includes the second semiconductor region, the first low-resistive semiconductor region overlapping at least a part of the top-gate electrode with an insulating film interposed therebetween.
    Type: Application
    Filed: November 27, 2023
    Publication date: May 30, 2024
    Inventor: Kazushige TAKECHI
  • Publication number: 20240178233
    Abstract: A thin-film transistor substrate includes a first oxide semiconductor film, a second oxide semiconductor film located upper than the first oxide semiconductor film, a first insulating film located lower than the second oxide semiconductor film and covering the first oxide semiconductor film. The first oxide semiconductor film includes first and second low-resistive regions, and a channel region. Each of the first and second low-resistive regions includes a source/drain region. The second oxide semiconductor film includes third and fourth low-resistive regions, and a channel region of a second thin-film transistor. Each of the third and fourth low-resistive regions includes a source/drain region of the second thin-film transistor. A part of the first low-resistive region extending from a source/drain region of the first thin-film transistor is a bottom-gate electrode of the second thin-film transistor.
    Type: Application
    Filed: November 27, 2023
    Publication date: May 30, 2024
    Inventor: Kazushige TAKECHI
  • Publication number: 20230369343
    Abstract: A thin-film transistor device is disclosed. A first semiconductor layer includes a first channel region and first source/drain regions sandwiching the first channel region. A second semiconductor layer includes a second channel region and second source/drain regions sandwiching the second channel region. A metal contact region is located in a hole extending through one or more upper insulating layers and one or more lower insulating layers and in contact with one of the first source/drain regions and one of the second source/drain regions. A diameter of the hole at the lowermost layer in the one or more upper insulating layers is larger than a diameter of the hole at the uppermost layer in the one or more lower insulating layers. The metal contact region is made of the same metal material as source/drain lines of the first thin-film transistor and the second thin-film transistor.
    Type: Application
    Filed: May 2, 2023
    Publication date: November 16, 2023
    Inventors: Kazushige TAKECHI, Genshiro KAWACHI
  • Publication number: 20230317732
    Abstract: An oxide semiconductor TFT device includes a substrate and a first oxide semiconductor TFT on the substrate. The first oxide semiconductor TFT includes a first oxide semiconductor layer, a first top-gate electrode, and a first source/drain electrode. The first oxide semiconductor layer includes a first channel region overlapping the first top-gate electrode, and two first low-resistive regions sandwiching the first channel region. The first source/drain electrode is located upper than the first top-gate electrode and extends through an insulating region overlapping one of the two first low-resistive regions to be in contact with the one of the two first low-resistive regions. Each of the two first low-resistive regions and the first channel region includes a lower amorphous layer and an upper crystalline layer having a composition identical to a composition of the amorphous layer.
    Type: Application
    Filed: March 29, 2023
    Publication date: October 5, 2023
    Inventor: Kazushige TAKECHI
  • Publication number: 20230178655
    Abstract: An oxide semiconductor thin-film transistor device includes a gate electrode region, an oxide semiconductor region, a first source/drain electrode region, and a second source/drain electrode region. The oxide semiconductor region has a concentration distribution of an element capable of increasing resistance of an oxide semiconductor. The concentration distribution shows a first concentration at the centroid of a channel region overlapping the gate electrode region in a planar view. The concentration distribution shows a concentration higher than the first concentration in a vicinity of at least a part of a boundary defining an outer end of the channel region.
    Type: Application
    Filed: December 5, 2022
    Publication date: June 8, 2023
    Applicant: Xiamen Tianma Display Technology Co., Ltd.
    Inventors: Jun TANAKA, Kazushige TAKECHI, Kenji SERA
  • Publication number: 20220302313
    Abstract: A thin-film transistor substrate includes an insulating substrate, a conductor layer including a top-gate electrode part of an oxide semiconductor thin-film transistor, an oxide semiconductor layer located lower than the top-gate electrode part and including a channel region of the oxide semiconductor thin-film transistor, and an upper insulating layer located between the conductor layer and the oxide semiconductor layer. The oxide semiconductor layer includes low-resistive regions lower in resistance than the channel region. The low-resistive regions sandwich the channel region in an in-plane direction of the insulating substrate and contain impurities to cause resistance reduction of the low-resistive regions. A concentration profile in a layering direction of the impurities to cause resistance reduction of the low resistive regions has one or more peaks. The one or more peaks are located outside the oxide semiconductor layer.
    Type: Application
    Filed: March 21, 2022
    Publication date: September 22, 2022
    Inventors: Kazushige TAKECHI, Kenji SERA, Jun TANAKA, Shui HE, FeiPeng LIN
  • Patent number: 11398508
    Abstract: A first oxide semiconductor thin-fil transistor includes a top gate electrode, a first metal oxide film, and a top gate insulating film between the top gate electrode and the first metal oxide film. A second oxide semiconductor thin-film transistor includes a bottom gate electrode, a second metal oxide film, and a bottom gate insulating film between the bottom gate electrode and the second metal oxide film. A storage capacitor stores a signal voltage to the bottom gate electrode. A first electrode of the storage capacitor includes a part of the bottom gate electrode. A source/drain region of the first oxide semiconductor thin-film transistor is in contact with the bottom gate electrode in a contact hole in the bottom gate insulating layer. Capacitance per unit area of the bottom gate insulating film is smaller than capacitance per unit area of the top gate insulating film.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: July 26, 2022
    Assignees: TIANMA JAPAN, LTD., Wuhan Tianma Micro-Electronics Co., Ltd.
    Inventors: Yuya Kuwahara, Kazushige Takechi
  • Patent number: 11380798
    Abstract: A thin-film device includes a polysilicon element and an oxide semiconductor element. The polysilicon element includes a first part made of low-resistive polysilicon. The oxide semiconductor element includes a second part made of low-resistive oxide semiconductor. The first part and the second part are disposed to overlap each other and connected.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: July 5, 2022
    Assignees: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD., TIANMA JAPAN, LTD.
    Inventors: Kazushige Takechi, Jun Tanaka, Kenji Sera, Yong Yuan
  • Publication number: 20220187238
    Abstract: An ion sensing device includes a first field-effect transistor, a second field-effect transistor, a reference electrode configured to directly contact a sample solution, a first ion-sensitive film, and a second ion-sensitive film. Each of the first field-effect transistor and the second field-effect transistor includes a semiconductor film, a bottom gate electrode, a bottom gate insulating film located between the bottom gate electrode and the semiconductor film, and a top gate insulating film. Surface materials in contact with the sample solution for the first ion-sensitive film and the second ion-sensitive films are the same. A sensitivity of the combination of the first field-effect transistor and the first ion-sensitive film is higher than a sensitivity of the combination of the second field-effect transistor and the second ion-sensitive film.
    Type: Application
    Filed: November 23, 2021
    Publication date: June 16, 2022
    Applicant: TIANMA JAPAN, LTD.
    Inventors: Kazushige TAKECHI, Shinnosuke IWAMATSU, Hiroki MURAYAMA, Yoshiyuki WATANABE
  • Patent number: 11342364
    Abstract: A thin-film transistor substrate includes an insulating substrate, a first insulating layer, a first thin-film transistor including a first oxide semiconductor film, a second insulating layer located upper than the first insulating layer, and a second thin-film transistor including a second oxide semiconductor film different in composition from the first oxide semiconductor film. At least a part of the first oxide semiconductor film is provided above and in contact with the first insulating layer. The first insulating layer is the uppermost insulating layer among insulating layers located lower than and in contact with the first oxide semiconductor film. At least a part of the second oxide semiconductor film is provided above and in contact with the second insulating layer. The second insulating layer is the uppermost insulating layer among insulating layers located lower than and in contact with the second oxide semiconductor film.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: May 24, 2022
    Assignees: TIANMA JAPAN. LTD., Wuhan Tianma Micro-Electronics Co., Ltd.
    Inventors: Jun Tanaka, Kazushige Takechi
  • Publication number: 20220149207
    Abstract: In an oxide semiconductor thin-film transistor, an oxide semiconductor part includes a channel region and a first and a second source/drain regions sandwiching the channel region. An insulator part made of a metal compound having a relative permittivity of not less than 8 is located between a gate electrode part and the oxide semiconductor part. A first compound interfacial part contains constituent elements of the oxide semiconductor part and constituent elements of the insulator part, and has an interface with a first source/drain electrode part and another interface with the first source/drain region. A second compound interfacial part contains constituent elements of the oxide semiconductor part and constituent elements of the insulator part, and has an interface with a second source/drain electrode part and another interface with the second source/drain region.
    Type: Application
    Filed: November 8, 2021
    Publication date: May 12, 2022
    Applicant: Wuhan Tianma Micro-Electronics Co., Ltd.
    Inventor: Kazushige TAKECHI
  • Publication number: 20220149202
    Abstract: A polysilicon layer includes a polysilicon part of a polysilicon thin-film transistor. A first conductor layer includes a first gate electrode part of the polysilicon thin-film transistor. The first insulator layer includes a first insulator part located between the first gate electrode part and the polysilicon part. The oxide semiconductor layer includes an oxide semiconductor part of an oxide semiconductor thin-film transistor. The second conductor layer includes a second gate electrode part of the oxide semiconductor thin-film transistor. The second insulator layer includes a second insulator part located between the second gate electrode part and the oxide semiconductor part. The second insulator layer has a relative permittivity of not less than 8. The entire area of the second insulator layer is covered with the second conductor layer.
    Type: Application
    Filed: November 8, 2021
    Publication date: May 12, 2022
    Applicant: Wuhan Tianma Micro-Electronics Co., Ltd.
    Inventor: Kazushige TAKECHI
  • Patent number: 11227879
    Abstract: A semiconductor device includes an insulating substrate, a polysilicon layer formed on the insulating substrate, a first-gate-insulating layer formed on the polysilicon layer, a first metal layer formed on the first-gate-insulating layer, an oxide-semiconductor layer formed on the first-gate-insulating layer, a second-gate-insulating layer formed on the oxide-semiconductor layer, a second metal layer formed on the second-gate-insulating layer, a first insulating interlayer formed on the second metal layer, a third metal layer formed on the first insulating interlayer, a first top gate planar type thin film transistor in which the polysilicon layer serves as a channel and which has a source, a drain and a gate, and a second top gate planar self-aligned type thin film transistor in which the oxide-semiconductor layer serves as a channel and which has a source, a drain and a gate, wherein the gate of the first top gate planar type thin film transistor is made of a first metal layer, the gate of the second top ga
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: January 18, 2022
    Assignee: TIANMA MICROELECTRONICS CO., LTD.
    Inventor: Kazushige Takechi
  • Publication number: 20210202540
    Abstract: A first oxide semiconductor thin-fil transistor includes a top gate electrode, a first metal oxide film, and a top gate insulating film between the top gate electrode and the first metal oxide film. A second oxide semiconductor thin-film transistor includes a bottom gate electrode, a second metal oxide film, and a bottom gate insulating film between the bottom gate electrode and the second metal oxide film. A storage capacitor stores a signal voltage to the bottom gate electrode. A first electrode of the storage capacitor includes a part of the bottom gate electrode. A source/drain region of the first oxide semiconductor thin-film transistor is in contact with the bottom gate electrode in a contact hole in the bottom gate insulating layer. Capacitance per unit area of the bottom gate insulating film is smaller than capacitance per unit area of the top gate insulating film.
    Type: Application
    Filed: December 23, 2020
    Publication date: July 1, 2021
    Applicants: Tianma Japan, Ltd., Wuhan Tianma Micro-Electronics Co., Ltd.
    Inventors: Yuya Kuwahara, Kazushige Takechi
  • Patent number: 10910454
    Abstract: A display device includes a substrate, regions on the substrate each including a transparent first and a second regions, one or more light-emitting elements disposed in the second region, and a circular polarizing pattern disposed in front of the pixel regions. Each of the one or more light-emitting elements includes a reflective electrode and a transparent electrode layered one above the other, and a light-emitting film provided between the transparent electrode and the reflective electrode. The light-emitting film is configured to emit light in response to electric current supplied between the reflective electrode and the transparent electrode. The circular polarizing pattern covers the entire reflective electrode when seen from the front of the display device. At least a part of the first region is located within a gap in the circular polarizing pattern when seen from the front of the display device.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: February 2, 2021
    Assignees: TIANMA JAPAN, LTD., Wuhan Tianma Micro-Electronics Co., Ltd.
    Inventors: Kazushige Takechi, Hiroshi Tanabe
  • Publication number: 20210013245
    Abstract: A thin-film transistor substrate includes an insulating substrate, a first insulating layer, a first thin-film transistor including a first oxide semiconductor film, a second insulating layer located upper than the first insulating layer, and a second thin-film transistor including a second oxide semiconductor film different in composition from the first oxide semiconductor film. At least a part of the first oxide semiconductor film is provided above and in contact with the first insulating layer. The first insulating layer is the uppermost insulating layer among insulating layers located lower than and in contact with the first oxide semiconductor film. At least a part of the second oxide semiconductor film is provided above and in contact with the second insulating layer. The second insulating layer is the uppermost insulating layer among insulating layers located lower than and in contact with the second oxide semiconductor film.
    Type: Application
    Filed: July 10, 2020
    Publication date: January 14, 2021
    Applicant: Tianma Japan, Ltd.
    Inventors: Jun TANAKA, Kazushige TAKECHI
  • Publication number: 20200395488
    Abstract: A thin-film device includes a polysilicon element and an oxide semiconductor element. The polysilicon element includes a first part made of low-resistive polysilicon. The oxide semiconductor element includes a second part made of low-resistive oxide semiconductor. The first part and the second part are disposed to overlap each other and connected.
    Type: Application
    Filed: June 12, 2020
    Publication date: December 17, 2020
    Inventors: Kazushige TAKECHI, Jun TANAKA, Kenji SERA, Yong YUAN
  • Publication number: 20200373336
    Abstract: A semiconductor device includes an insulating substrate, a polysilicon layer formed on the insulating substrate, a first-gate-insulating layer formed on the polysilicon layer, a first metal layer formed on the first-gate-insulating layer, an oxide-semiconductor layer formed on the first-gate-insulating layer, a second-gate-insulating layer formed on the oxide-semiconductor layer, a second metal layer formed on the second-gate-insulating layer, a first insulating interlayer formed on the second metal layer, a third metal layer formed on the first insulating interlayer, a first top gate planar type thin film transistor in which the polysilicon layer serves as a channel and which has a source, a drain and a gate, and a second top gate planar self-aligned type thin film transistor in which the oxide-semiconductor layer serves as a channel and which has a source, a drain and a gate, wherein the gate of the first top gate planar type thin film transistor is made of a first metal layer, the gate of the second top ga
    Type: Application
    Filed: August 13, 2020
    Publication date: November 26, 2020
    Inventor: Kazushige TAKECHI
  • Patent number: 10797088
    Abstract: A semiconductor device includes an insulating substrate, a polysilicon layer, a first-gate-insulating layer, a first metal layer, an oxide-semiconductor layer, a second-gate-insulating layer, a second metal layer, a first insulating interlayer, a third metal layer, a first top gate planar type thin film transistor in which the polysilicon layer serves as a channel, and a second top gate planar self-aligned type thin film transistor in which the oxide-semiconductor layer serves as a channel. The gates of the first top gate planar type thin film transistor and the second top gate planar self-aligned type thin film transistor are made of the first and second metal layers, respectively. The sources and the drains of the first top gate planar type thin film transistor and the second top gate planar self-aligned type thin film transistor are made of the third metal layer.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: October 6, 2020
    Assignee: TIANMA MICROELECTRONICS CO., LTD.
    Inventor: Kazushige Takechi