Patents by Inventor Kazusumi Kuwano

Kazusumi Kuwano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for analyzing variations in source voltage of semiconductor device
    Patent number: 6253354
    Abstract: In a method and apparatus of the present invention, variations in source voltage of the power source wiring of an LSI are analyzed cell by cell without test patterns. An operation time calculator (14) statically calculates the operation time of each instance of a given logic circuit according to the outputs of a net list unit (11), a layout data unit (12), and a cell delay library (13). A maximum current calculator (16) calculates the time, value, and location of maximum current consumption of the logic circuit as a whole according to the outputs of operation time calculator (14), net list unit (11), layout data unit (12); and a cell power library (15). A variation analyzer (17) analyzes and verifies a voltage drop in the power source wiring of the logic circuit according to the output of the maximum current calculator (16).
    Type: Grant
    Filed: March 2, 1999
    Date of Patent: June 26, 2001
    Assignee: Fujitsu Limited
    Inventors: Kazusumi Kuwano, Akio Hirayama