Patents by Inventor Kazutaka Miura

Kazutaka Miura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7513981
    Abstract: A load lock chamber (12) is connected in a front stage of a film forming chamber (11) through a damper and the like. A pipe to which a N2 gas and aeriform or fog-like H2O are supplied is connected to the load lock chamber (12). The pipe is led from a vaporizer (13). Inside the load lock chamber (12), a carrying section 15 on which a wafer (20) is placed is provided, whereas outside the load lock chamber (12), a cooler (14) cooling a carrying section (15) by means of liquid nitrogen is arranged. The temperature of the carrying section 15 is held at, for example, ?4° C.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: April 7, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Kazutaka Miura, Shozo Noda
  • Publication number: 20050241932
    Abstract: A load lock chamber (12) is connected in a front stage of a film forming chamber (11) through a damper and the like. A pipe to which a N2 gas and aeriform or fog-like H2O are supplied is connected to the load lock chamber (12). The pipe is led from a vaporizer (13). Inside the load lock chamber (12), a carrying section 15 on which a wafer (20) is placed is provided, whereas outside the load lock chamber (12), a cooler (14) cooling a carrying section (15) by means of liquid nitrogen is arranged. The temperature of the carrying section 15 is held at, for example, ?4° C.
    Type: Application
    Filed: March 25, 2005
    Publication date: November 3, 2005
    Inventors: Kazutaka Miura, Shozo Noda
  • Patent number: 6900062
    Abstract: There are provided the steps of forming a first conductive layer, an oxide dielectric layer, and a second conductive layer sequentially over a first insulating layer formed over a semiconductor substrate, forming a capacitor consisting of an upper electrode, a dielectric layer, and a lower electrode made by patterning the second conductive layer, the oxide dielectric layer, and the first conductive layer, forming a second insulating layer over the capacitor and the first insulating layer, forming a hole in the second insulating layer on the upper electrode, and supplying an activated oxygen to the capacitor via the hole in a state that the semiconductor substrate is heated.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: May 31, 2005
    Assignee: Fujitsu Limited
    Inventor: Kazutaka Miura
  • Publication number: 20040147046
    Abstract: There are provided the steps of forming a first conductive layer, an oxide dielectric layer, and a second conductive layer sequentially over a first insulating layer formed over a semiconductor substrate, forming a capacitor consisting of an upper electrode, a dielectric layer, and a lower electrode made by patterning the second conductive layer, the oxide dielectric layer, and the first conductive layer, forming a second insulating layer over the capacitor and the first insulating layer, forming a hole in the second insulating layer on the upper electrode, and supplying an activated oxygen to the capacitor via the hole in a state that the semiconductor substrate is heated.
    Type: Application
    Filed: August 22, 2003
    Publication date: July 29, 2004
    Applicant: FUJITSU LIMITED
    Inventor: Kazutaka MIURA
  • Publication number: 20030089938
    Abstract: There is provided a semiconductor device which comprises capacitors having lower electrodes, which are formed of platinum on a first insulating film over a semiconductor substrate to have a contact region, and upper electrodes formed on the lower electrodes via a dielectric film respectively, a second insulating film formed on the capacitors, a hole formed in the second insulating film on the contact region of the lower electrode, and a wiring constructed by forming an underlying conductive film, a minimum thickness of which is thicker than 30 nm at a bottom of the hole, and an aluminum film sequentially, and formed from an inside of the hole to an upper surface of the second insulating film.
    Type: Application
    Filed: October 23, 2002
    Publication date: May 15, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Kaoru Saigoh, Nobutaka Ohyagi, Kouji Tani, Hisashi Miyazawa, Kazutaka Miura