Patents by Inventor Kazutaka Mukaiyama
Kazutaka Mukaiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9887684Abstract: An isolator includes a core isolator, a main substrate and a circuit-defining section. The main substrate includes a first wiring portion, a second wiring portion and a third wiring portion and has the core isolator and the circuit-defining section mounted thereon. An input port of the core isolator is connected to the first wiring portion. An output port of the core isolator is connected to the second wiring portion. A ground port of the core isolator is connected to the third wiring portion. In the circuit-defining section, a conductor pattern includes a capacitor that is connected in parallel with the core isolator via the first wiring portion and the second wiring portion, and an impedance element that is connected to at least either of the first wiring portion and the second wiring portion.Type: GrantFiled: February 9, 2016Date of Patent: February 6, 2018Assignee: Murata Manufacturing Co., Ltd.Inventors: Kazutaka Mukaiyama, Kenji Saito, Takaya Wada, Reiji Nakajima, Shingo Yanagihara
-
Patent number: 9553349Abstract: To achieve favorable directivity in a directional coupler, even with a low magnetic-field coupling coefficient, the directional coupler includes a main line, a secondary line, and impedance conversion sections. The main line is connected between a signal input port and a signal output port. The secondary line is coupled to the main line through coupling capacitance and mutual inductance. The impedance conversion sections are connected between the secondary line and a coupling port or an isolation port, and the impedance viewed from the secondary line differs from the impedance viewed from a port side while both impedances viewed from the secondary line are equal.Type: GrantFiled: August 28, 2014Date of Patent: January 24, 2017Assignee: Murata Manufacturing Co., Ltd.Inventor: Kazutaka Mukaiyama
-
Publication number: 20160173056Abstract: An isolator includes a core isolator, a main substrate and a circuit-defining section. The main substrate includes a first wiring portion, a second wiring portion and a third wiring portion and has the core isolator and the circuit-defining section mounted thereon. An input port of the core isolator is connected to the first wiring portion. An output port of the core isolator is connected to the second wiring portion. A ground port of the core isolator is connected to the third wiring portion. In the circuit-defining section, a conductor pattern includes a capacitor that is connected in parallel with the core isolator via the first wiring portion and the second wiring portion, and an impedance element that is connected to at least either of the first wiring portion and the second wiring portion.Type: ApplicationFiled: February 9, 2016Publication date: June 16, 2016Inventors: Kazutaka MUKAIYAMA, Kenji SAITO, Takaya WADA, Reiji NAKAJIMA, Shingo YANAGIHARA
-
Publication number: 20140368293Abstract: To achieve favorable directivity in a directional coupler, even with a low magnetic-field coupling coefficient, the directional coupler includes a main line, a secondary line, and impedance conversion sections. The main line is connected between a signal input port and a signal output port. The secondary line is coupled to the main line through coupling capacitance and mutual inductance. The impedance conversion sections are connected between the secondary line and a coupling port or an isolation port, and the impedance viewed from the secondary line differs from the impedance viewed from a port side while both impedances viewed from the secondary line are equal.Type: ApplicationFiled: August 28, 2014Publication date: December 18, 2014Applicant: MURATA MANUFACTURING CO., LTD.Inventor: Kazutaka MUKAIYAMA
-
Patent number: 8803633Abstract: In a directional coupler, even when parasitic inductance exists, an increase in device size can be suppressed while obtaining good isolation characteristics. A transmission line type directional coupler includes a main line and a sub line that is coupled to the main line through electric field coupling and magnetic field coupling. The main line includes a signal input port and a signal output port, and the sub line includes a coupling port and an isolation port. A series capacitor is connected to only one of the signal output port and the coupling port.Type: GrantFiled: May 9, 2013Date of Patent: August 12, 2014Assignee: Murata Manufacturing Co., Ltd.Inventors: Daisuke Tokuda, Kazutaka Mukaiyama
-
Publication number: 20130241668Abstract: In a directional coupler, even when parasitic inductance exists, an increase in device size can be suppressed while obtaining good isolation characteristics. A transmission line type directional coupler includes a main line and a sub line that is coupled to the main line through electric field coupling and magnetic field coupling. The main line includes a signal input port and a signal output port, and the sub line includes a coupling port and an isolation port. A series capacitor is connected to only one of the signal output port and the coupling port.Type: ApplicationFiled: May 9, 2013Publication date: September 19, 2013Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Daisuke TOKUDA, Kazutaka MUKAIYAMA
-
Patent number: 8421553Abstract: The disclosure provides a directional coupler having favorable characteristics even when a parasite inductance is present on a coupling line. The directional coupler includes resistive elements between at least either a signal input port and a coupling port or between a signal output port and an isolation port. The resistive elements can reduce the output from the ISO port and improve directivity.Type: GrantFiled: August 15, 2012Date of Patent: April 16, 2013Assignee: Murata Manufacturing Co., Ltd.Inventor: Kazutaka Mukaiyama
-
Publication number: 20120306589Abstract: The disclosure provides a directional coupler having favorable characteristics even when a parasite inductance is present on a coupling line. The directional coupler includes resistive elements between at least either a signal input port and a coupling port or between a signal output port and an isolation port. The resistive elements can reduce the output from the ISO port and improve directivity.Type: ApplicationFiled: August 15, 2012Publication date: December 6, 2012Applicant: MURATA MANUFACTURING CO., LTD.Inventor: Kazutaka MUKAIYAMA
-
Patent number: 8134221Abstract: An inductor includes a first air-bridge section and a second air-bridge section. The first air-bridge unit extends in a floating location over a substrate between a plurality of support locations on the substrate. The second air-bridge unit extends in a floating location over the first air-bridge unit between a plurality of support locations on the first air-bridge unit. This arrangement enables the first and second air-bridge sections to be connected in parallel, thus branching a flowing current. Thus, the conductor loss in each of the first and second air-bridge sections is reduced.Type: GrantFiled: May 18, 2009Date of Patent: March 13, 2012Assignee: Murata Manufacturing Co., Ltd.Inventors: Kazutaka Mukaiyama, Hiroshi Kawai, Naoto Yatani, Makoto Inai, Akinori Hamada
-
Publication number: 20100006977Abstract: An inductor includes a first air-bridge section and a second air-bridge section. The first air-bridge unit extends in a floating location over a substrate between a plurality of support locations on the substrate. The second air-bridge unit extends in a floating location over the first air-bridge unit between a plurality of support locations on the first air-bridge unit. This arrangement enables the first and second air-bridge sections to be connected in parallel, thus branching a flowing current. Thus, the conductor loss in each of the first and second air-bridge sections is reduced.Type: ApplicationFiled: May 18, 2009Publication date: January 14, 2010Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Kazutaka MUKAIYAMA, Hiroshi KAWAI, Naoto YATANI, Makoto INAI, Akinori HAMADA
-
Patent number: 7518472Abstract: A transmission line having a slot line with a slot formed on a front surface electrode on a dielectric substrate, and two such slot lines are positioned with the front surface electrodes separated from one another with a gap therebetween. A slot resonator with one end open at the gap side is provided at the front edge side of each slot line, and these slot resonators are positioned so as to be capable of coupling to one another .A slot stub which is branched out from the gap side is provided on each front surface electrode. Thus, leakage of a high-frequency signal in the gap can be suppressed with the slot stub.Type: GrantFiled: July 25, 2005Date of Patent: April 14, 2009Assignee: Murata Manufacturing Co., Ltd.Inventors: Kazutaka Mukaiyama, Shigeyuki Mikami, Yohei Ishikawa
-
Patent number: 7365618Abstract: A high-frequency circuit device, a high-frequency module, and a communication apparatus, which prevent generation of an undesired wave to prevent electrical power loss and undesired coupling, are provided. The high-frequency circuit device includes a first slot line and a second slot line, which are provided at respective surfaces of a dielectric substrate, are formed with the same shape. An FET is provided on the first slot line. For preventing the mounting of the FET from causing a phase difference to occur between a high-frequency signal, which propagates along the first slot line, and a high-frequency signal, which propagates along the second slot line, a phase-adjusting stub is formed at a position of a stub at the second slot line. The phase is adjusted by changing the length of the stub.Type: GrantFiled: July 31, 2007Date of Patent: April 29, 2008Assignee: Murata Manufacturing Co., Ltd.Inventors: Kazutaka Mukaiyama, Seiji Hidaka, Koichi Takizawa, Koichi Sakamoto
-
Publication number: 20070285190Abstract: A high-frequency circuit device, a high-frequency module, and a communication apparatus, which prevent generation of an undesired wave to prevent electrical power loss and undesired coupling, are provided. The high-frequency circuit device includes a first slot line and a second slot line, which are provided at respective surfaces of a dielectric substrate, are formed with the same shape. An FET is provided on the first slot line. For preventing the mounting of the FET from causing a phase difference to occur between a high-frequency signal, which propagates along the first slot line, and a high-frequency signal, which propagates along the second slot line, a phase-adjusting stub is formed at a position of a stub at the second slot line. The phase is adjusted by changing the length of the stub.Type: ApplicationFiled: July 31, 2007Publication date: December 13, 2007Inventors: Kazutaka Mukaiyama, Seiji Hidaka, Koichi Takizawa, Koichi Sakamoto
-
Publication number: 20070176713Abstract: A transmission line having a slot line with a slot formed on a front surface electrode on a dielectric substrate, and two such slot lines are positioned with the front surface electrodes separated from one another with a gap therebetween. A slot resonator with one end open at the gap side is provided at the front edge side of each slot line, and these slot resonators are positioned so as to be capable of coupling to one another. A slot stub which is branched out from the gap side is provided on each front surface electrode. Thus, leakage of a high-frequency signal in the gap can be suppressed with the slot stub.Type: ApplicationFiled: July 25, 2005Publication date: August 2, 2007Inventors: Kazutaka Mukaiyama, Shigeyuki Mikami, Yohei Ishikawa
-
Publication number: 20070115066Abstract: A radio-frequency amplifier having an input-side line portion and an output-side line portion including an input slot line and an output slot line extending in parallel formed on a substrate. In a connecting portion of a transistor, a gate electrode G, a drain electrode D, and source electrodes S are arranged in a coplanar manner. The gate electrode G, the drain electrode D, and the source electrodes S are connected to DC electrodes and a ground electrode, respectively, in a flip chip method via bumps, so that the orientation of the slot lines is perpendicular to the orientation of the gate electrode G and the drain electrode D. Preferably, the source electrodes S of the transistor are connected via an air bridge.Type: ApplicationFiled: November 10, 2004Publication date: May 24, 2007Inventors: Hiroyasu Matsuzaki, Kazutaka Mukaiyama, Koichi Sakamoto
-
Publication number: 20070046402Abstract: A planar dielectric line having a first slot sandwiched between first and second electrodes is provided on a surface of a dielectric substrate. A second slot is positioned so as to face the first slot and is sandwiched between third and fourth electrodes on the rear face of the dielectric substrate. The width of the first slot is narrower than the width of the second slot so that the electromagnetic field energy of a high-frequency signal is concentrated in the first slot.Type: ApplicationFiled: July 29, 2004Publication date: March 1, 2007Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Kazutaka Mukaiyama, Shigeyuki Mikami, Koichi Sakamoto, Yohei Ishikawa
-
Patent number: 6943651Abstract: A dielectric resonator device includes a dielectric substrate. Electrode films are formed on the front and back surfaces of the dielectric substrate, respectively. A TE010-mode resonator is constituted by two circular openings which oppose each other and which are formed in the electrode films. Two opposing slots formed in the electrode films constitute a planar dielectric transmission line (PDTL). The PDTL is connected to the TE010-mode resonator. An excitation section is formed by extending two portions of each electrode film on two side of each slot into each opening.Type: GrantFiled: April 17, 2003Date of Patent: September 13, 2005Assignee: Murata Manufacturing Co., Ltd.Inventors: Kazutaka Mukaiyama, Shigeyuki Mikami, Hiroyasu Matsuzaki, Kiyoharu Kochi, Akiko Kochi, Takahiro Baba, Koichi Sakamoto, Tetsuya Kochi
-
Patent number: 6891452Abstract: A high-frequency circuit device includes a dielectric substrate. A planar conductor is provided on each of top and bottom surfaces of the dielectric substrate and a slot line is formed on the top surface. Also, undesired-wave propagation preventing circuits, each including multistage band-elimination filters, are provided on the top surface of the dielectric substrate, with the slot line therebetween. Each of the band-elimination filters includes two conductive lines and a resonator which is provided at a portion of one of the conductive lines and which includes two spiral lines. Accordingly, propagation of an undesired wave of the band whose center is the resonance frequency of the resonator can be prevented.Type: GrantFiled: February 26, 2003Date of Patent: May 10, 2005Assignee: Murata Manufacturing Co., Ltd.Inventors: Shigeyuki Mikami, Kiyoharu Kochi, Akiko Kochi, Hiroyasu Matsuzaki, Kazutaka Mukaiyama, Koichi Sakamoto, Yohei Ishikawa, Tetsuya Kouchi
-
Publication number: 20040041668Abstract: A high-frequency circuit device includes a dielectric substrate. A planar conductor is provided on each of top and bottom surfaces of the dielectric substrate and a slot line is formed on the top surface. Also, undesired-wave propagation preventing circuits, each including multistage band-elimination filters, are provided on the top surface of the dielectric substrate, with the slot line therebetween. Each of the band-elimination filters includes two conductive lines and a resonator which is provided at a portion of one of the conductive lines and which includes two spiral lines. Accordingly, propagation of an undesired wave of the band whose center is the resonance frequency of the resonator can be prevented.Type: ApplicationFiled: February 26, 2003Publication date: March 4, 2004Inventors: Shigeyuki Mikami, Tetsuya Kochi, Hiroyasu Matsuzaki, Kazutaka Mukaiyama, Koichi Sakamoto, Yohei Ishikawa, Kiyoharu Kochi, Akiko Kochi
-
Publication number: 20040021531Abstract: A dielectric resonator device includes a dielectric substrate. Electrode films are formed on the front and back surfaces of the dielectric substrate, respectively. A TE010-mode resonator is constituted by two circular openings which oppose each other and which are formed in the electrode films. Two opposing slots formed in the electrode films constitute a planar dielectric transmission line (PDTL). The PDTL is connected to the TE010-mode resonator. An excitation section is formed by extending two portions of each electrode film on two side of each slot into each opening.Type: ApplicationFiled: April 17, 2003Publication date: February 5, 2004Inventors: Kazutaka Mukaiyama, Shigeyuki Mikami, Hiroyasu Matsuzaki, Tetsuya Kochi, Takahiro Baba, Koichi Sakamoto, Kiyoharu Kochi, Akiko Kochi