Patents by Inventor Kazutaka Senoo

Kazutaka Senoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11171505
    Abstract: An electric power control device includes: an ECU; a DC power supply; a backup power supply which has a control power supply as an operation source, supplies electric power to the ECU when an electric power supply from a battery to the ECU is stopped, and supplies electric power to the DC power supply when an electric power supply from the battery to the DC power supply is stopped; a first ground line connected to a ground terminal of the DC power supply; a second ground line connected to a ground terminal of the backup power supply; a current path formation unit which electrically connects the first ground line to the second ground line and forms a path in which a current flows from the first ground line to the second ground line in one direction; and a noise minimizing component connected to the current path formation unit in series.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: November 9, 2021
    Assignees: KEIHIN CORPORATION, HONDA MOTOR CO., LTD.
    Inventors: Kazuya Sugano, Kazutaka Senoo, Koji Suzuki, Yasuhiko Kondo, Yasushi Hori
  • Publication number: 20210075250
    Abstract: An electric power control device includes: an ECU; a DC power supply; a backup power supply which has a control power supply as an operation source, supplies electric power to the ECU when an electric power supply from a battery to the ECU is stopped, and supplies electric power to the DC power supply when an electric power supply from the battery to the DC power supply is stopped; a first ground line connected to a ground terminal of the DC power supply; a second ground line connected to a ground terminal of the backup power supply; a current path formation unit which electrically connects the first ground line to the second ground line and forms a path in which a current flows from the first ground line to the second ground line in one direction; and a noise minimizing component connected to the current path formation unit in series.
    Type: Application
    Filed: September 3, 2020
    Publication date: March 11, 2021
    Inventors: Kazuya SUGANO, Kazutaka SENOO, Koji SUZUKI, Yasuhiko KONDO, Yasushi HORI
  • Patent number: 10054648
    Abstract: A power source voltage detection apparatus is provided, including a reference voltage generator connected to a differential amplifier via a first transmission line and decreases a power source voltage of a direct current power source to output a power source reference voltage, the first transmission line transmitting the power source reference voltage as a first power source voltage detection voltage; a standard voltage generator connected to the differential amplifier via a second transmission line and outputs a predetermined standard voltage, the second transmission line transmitting the standard voltage as a second power source voltage detection voltage; the differential amplifier differentially amplifying the first and second power source voltage detection voltages; and an abnormality detector which, based on the first and second power source voltage detection voltages, detects the power source voltage and detects an abnormality of the first transmission line and/or the second transmission line.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: August 21, 2018
    Assignee: KEIHIN CORPORATION
    Inventors: Shugo Ueno, Kazutaka Senoo, Kouji Suzuki
  • Publication number: 20160131690
    Abstract: A power source voltage detection apparatus is provided, including a reference voltage generator connected to a differential amplifier via a first transmission line and decreases a power source voltage of a direct current power source to output a power source reference voltage, the first transmission line transmitting the power source reference voltage as a first power source voltage detection voltage; a standard voltage generator connected to the differential amplifier via a second transmission line and outputs a predetermined standard voltage, the second transmission line transmitting the standard voltage as a second power source voltage detection voltage; the differential amplifier differentially amplifying the first and second power source voltage detection voltages; and an abnormality detector which, based on the first and second power source voltage detection voltages, detects the power source voltage and detects an abnormality of the first transmission line and/or the second transmission line.
    Type: Application
    Filed: October 7, 2015
    Publication date: May 12, 2016
    Inventors: Shugo UENO, Kazutaka SENOO, Kouji SUZUKI
  • Patent number: 8111061
    Abstract: An embodiment of the present invention provides a multi-output determination circuit that determines whether or not any one input voltage of a plurality of input voltages is equal to or higher than an upper-limit voltage value. This multi-output determination circuit includes a first diode-OR, upper-limit reference voltage generation means, and a first comparator. The first diode-OR includes a plurality of first diodes whose anodes are each connected to a respective one of the plurality of input voltages and whose cathodes are connected in common. The upper-limit reference voltage generation means has a first resistor, the first diode, and a second resistor that are connected in series between first and second power supply potentials, and generates an upper-limit reference voltage based on the voltage of the cathode of the first diode. The first comparator compares the output voltage of the first diode-OR with the upper-limit reference voltage.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: February 7, 2012
    Assignee: Keihin Corporation
    Inventors: Kouji Suzuki, Kenichi Takebayashi, Kazutaka Senoo
  • Patent number: 7868682
    Abstract: According to an embodiment of the present invention, an insulating communication circuit includes a first insulating circuit 62#11 having first and second circuits, a second insulating circuit 62#12 having third and fourth circuits, and a communication interface that is connected to a first ground and transmits a signal to the first circuit based on a communication signal and a clock signal from an external control device.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: January 11, 2011
    Assignee: Keihin Corporation
    Inventors: Kouji Suzuki, Kenichi Takebayashi, Kazutaka Senoo
  • Publication number: 20090309643
    Abstract: According to an embodiment of the present invention, an insulating communication circuit includes a first insulating circuit 62#11 having first and second circuits, a second insulating circuit 62#12 having third and fourth circuits, and a communication interface that is connected to a first ground and transmits a signal to the first circuit based on a communication signal and a clock signal from an external control device.
    Type: Application
    Filed: June 9, 2009
    Publication date: December 17, 2009
    Applicant: KEIHIN CORPORATION
    Inventors: Kouji Suzuki, Kenichi Takebayashi, Kazutaka Senoo
  • Publication number: 20090309575
    Abstract: An embodiment of the present invention provides a multi-output determination circuit that determines whether or not any one input voltage of a plurality of input voltages is equal to or higher than an upper-limit voltage value. This multi-output determination circuit includes a first diode-OR, upper-limit reference voltage generation means, and a first comparator. The first diode-OR includes a plurality of first diodes whose anodes are each connected to a respective one of the plurality of input voltages and whose cathodes are connected in common. The upper-limit reference voltage generation means has a first resistor, the first diode, and a second resistor that are connected in series between first and second power supply potentials, and generates an upper-limit reference voltage based on the voltage of the cathode of the first diode. The first comparator compares the output voltage of the first diode-OR with the upper-limit reference voltage.
    Type: Application
    Filed: June 9, 2009
    Publication date: December 17, 2009
    Applicant: KEIHIN CORPORATION
    Inventors: Kouji Suzuki, Kenichi Takebayashi, Kazutaka Senoo