Patents by Inventor Kazutaka Takagi

Kazutaka Takagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10116266
    Abstract: A Doherty amplifier of an embodiment includes an input terminal, an output terminal a splitter, a combiner, a carrier amplifier, a peak amplifier. The splitter is connected to the input terminal, the splitter having first and second outputs. The combiner is connected to the output terminal, the combiner having first and second inputs. The carrier amplifier includes a first input-side two-port network connected to the first output of the splitter, a first amplifier connected to an output of the first input-side two-port network, and a first output-side two-port network connected between an output of the first amplifier and the first input of the combiner. The peak amplifier includes a second input-side two-port network connected to the second output of the splitter, a second amplifier connected to the output of the second input-side two-port network, and a second output-side two-port network connected between an output of the second amplifier and the second input of the combiner.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: October 30, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazutaka Takagi, Naotaka Tomita
  • Patent number: 10110185
    Abstract: A microwave semiconductor device of an embodiment includes a package, a semiconductor amplifying element, an output matching circuit, and a smoothing circuit. The package includes a metal base plate, a frame body bonded to a surface of the metal base plate, an input feedthrough part, and an output feedthrough part. The semiconductor amplifying element has an output electrode. The output matching circuit includes an output matching capacitor, and a first bonding wire connected to the output matching capacitor and the output electrode. The smoothing circuit includes a smoothing capacitor, and a second bonding wire. The smoothing capacitor is connected by the second bonding wire to a position in the output matching circuit at which capacitive reactance component of a load impedance seen from the output matching capacitor is smaller than inductive reactance component of the load impedance seen from the output electrode of the semiconductor amplifying element.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: October 23, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazutaka Takagi
  • Patent number: 9985584
    Abstract: According to one embodiment, a high-frequency semiconductor amplifier includes an input terminal, an input matching circuit, a high-frequency semiconductor amplifying element, an output matching circuit and an output terminal. The input terminal is inputted with a fundamental signal. The fundamental signal has a first frequency band and a first center frequency in the first frequency band. The input matching circuit includes an input end and an output end. The input end of the input matching circuit is connected to the input terminal. The high-frequency semiconductor amplifying element includes an input end and an output end. The input end of the high-frequency semiconductor amplifying element is connected to the output end of the input matching circuit. The high-frequency semiconductor amplifying element is configured to amplify the fundamental signal.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: May 29, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazutaka Takagi, Yukio Takahashi
  • Patent number: 9947628
    Abstract: A high frequency semiconductor amplifier includes an input circuit, a first semiconductor element, first bonding wires, an interstage circuit, second bonding wires, a second semiconductor element, third bonding wires, an output circuit, fourth bonding wires and a package. The input circuit includes a first DC blocking capacitor, an input transmission line, a first input pad part, and a first bias circuit. The interstage circuit includes a second DC blocking capacitor, an interstage transmission line, a first output pad part, and a second bias circuit, a microstrip line divider, and a second input pad part. The output circuit includes a second output pad part, a microstrip line combiner, a third DC blocking capacitor, an output transmission line, and a fourth bias circuit. The first and second semiconductor elements, the input circuit, the interstage circuit, and the output circuit are bonded to the package.
    Type: Grant
    Filed: August 18, 2016
    Date of Patent: April 17, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazutaka Takagi
  • Patent number: 9935581
    Abstract: According to one embodiment, a high-frequency semiconductor amplifier includes an input terminal, an input matching circuit, a high-frequency semiconductor amplifying element, an output matching circuit and an output terminal. The input terminal is inputted with a fundamental signal. The fundamental signal has a first frequency band and a first center frequency in the first frequency band. The input matching circuit includes an input end and an output end. The input end of the input matching circuit is connected to the input terminal. The high-frequency semiconductor amplifying element includes an input end and an output end. The input end of the high-frequency semiconductor amplifying element is connected to the output end of the input matching circuit. The high-frequency semiconductor amplifying element is configured to amplify the fundamental signal.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: April 3, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazutaka Takagi
  • Patent number: 9929693
    Abstract: According to one embodiment, a high-frequency semiconductor amplifier includes an input terminal, an input matching circuit, a high-frequency semiconductor amplifying element, an output matching circuit and an output terminal. The input terminal is inputted with a fundamental signal. The fundamental signal has a first frequency band and a first center frequency in the first frequency band. The input matching circuit includes an input end and an output end. The input end of the input matching circuit is connected to the input terminal. The high-frequency semiconductor amplifying element includes an input end and an output end. The input end of the high-frequency semiconductor amplifying element is connected to the output end of the input matching circuit. The high-frequency semiconductor amplifying element is configured to amplify the fundamental signal.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: March 27, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazutaka Takagi
  • Publication number: 20180083582
    Abstract: A microwave semiconductor device of an embodiment includes a package, a semiconductor amplifying element, an output matching circuit, and a smoothing circuit. The package includes a metal base plate, a frame body bonded to a surface of the metal base plate, an input feedthrough part, and an output feedthrough part. The semiconductor amplifying element has an output electrode. The output matching circuit includes an output matching capacitor, and a first bonding wire connected to the output matching capacitor and the output electrode. The smoothing circuit includes a smoothing capacitor, and a second bonding wire. The smoothing capacitor is connected by the second bonding wire to a position in the output matching circuit at which capacitive reactance component of a load impedance seen from the output matching capacitor is smaller than inductive reactance component of the load impedance seen from the output electrode of the semiconductor amplifying element.
    Type: Application
    Filed: May 19, 2017
    Publication date: March 22, 2018
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Kazutaka TAKAGI
  • Patent number: 9774298
    Abstract: According to one embodiment, a high-frequency amplifier includes an active element and an output matching circuit. The active element is provided on a substrate. The active element is configured to amplify a signal having a frequency band. The active element includes a cell region. The output matching circuit is connected to the active element. The output matching circuit includes a wire, a transmission line and an output terminal. The wire includes an input end and an output end. The input end of the wire is connected to an output part of the cell region of the active element. The transmission line is provided on the substrate. The transmission line includes an input part and an output part. The input part of the transmission line is connected to the output end of the wire. The output terminal is provided on the substrate.
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: September 26, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenta Kuroda, Kazutaka Takagi
  • Patent number: 9748904
    Abstract: A high frequency signal amplifying circuitry of an embodiment includes a first splitter, a first amplifier, a second amplifier, a loop oscillation suppressor, and a combiner. The first amplifier includes a second splitter, a first carrier amplifier, a first peak amplifier, and a first combiner. The second amplifier includes a third splitter, a second carrier amplifier, a second peak amplifier, and a second combiner. The second carrier amplifier being adjacent to an associated the first carrier amplifier or the second peak amplifier being adjacent to an associated the first peak amplifier. The loop oscillation suppressor located between the second carrier amplifier and the associated first carrier amplifier or the second peak amplifier and the associated first peak amplifier.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: August 29, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazutaka Takagi, Naotaka Tomita
  • Patent number: 9712142
    Abstract: Certain embodiments provide a high frequency semiconductor device including a plurality of unit FETs, an input dividing/matching circuit, an output combining/matching circuit, and a low-frequency-oscillation-suppressing-circuit. The input dividing/matching circuit has an input end and a plurality of divided output ends connected to the unit FETs, and is symmetrical about a center axis of the input end. The output combining/matching circuit has an output end and a plurality of divided input ends connected to the unit FETs, and is symmetrical about a center axis of the output end. The low-frequency-oscillation-suppressing-circuit is connected to at least one of the input end of the input dividing/matching circuit and the output end of the output combining/matching circuit.
    Type: Grant
    Filed: February 6, 2015
    Date of Patent: July 18, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazutaka Takagi, Tomohito Oomori
  • Patent number: 9691865
    Abstract: A high frequency semiconductor device includes a stacked body, a gate electrode, a source electrode and a drain electrode. The gate electrode includes a bending gate part and a straight gate part. The bending gate part is extended in a zigzag shape and has first and second outer edges. The source electrode includes a bending source part and a straight source part. The bending source part has an outer edge spaced by a first distance from the first outer edge of the bending gate part along a normal direction. The drain electrode includes a bending drain part and a straight drain part. The bending drain part has an outer edge spaced by a second distance from the second outer edge of the bending gate part along the normal direction.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: June 27, 2017
    Assignee: Kabushiki Kaishi Toshiba
    Inventor: Kazutaka Takagi
  • Publication number: 20170162525
    Abstract: A high frequency semiconductor amplifier includes an input circuit, a first semiconductor element, first bonding wires, an interstage circuit, second bonding wires, a second semiconductor element, third bonding wires, an output circuit, fourth bonding wires and a package. The input circuit includes a first DC blocking capacitor, an input transmission line, a first input pad part, and a first bias circuit. The interstage circuit includes a second DC blocking capacitor, an interstage transmission line, a first output pad part, and a second bias circuit, a microstrip line divider, and a second input pad part. The output circuit includes a second output pad part, a microstrip line combiner, a third DC blocking capacitor, an output transmission line, and a fourth bias circuit. The first and second semiconductor elements, the input circuit, the interstage circuit, and the output circuit are bonded to the package.
    Type: Application
    Filed: August 18, 2016
    Publication date: June 8, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Kazutaka Takagi
  • Publication number: 20170163221
    Abstract: A Doherty amplifier of an embodiment includes an input terminal, an output terminal a splitter, a combiner, a carrier amplifier, a peak amplifier. The splitter is connected to the input terminal, the splitter having first and second outputs. The combiner is connected to the output terminal, the combiner having first and second inputs. The carrier amplifier includes a first input-side two-port network connected to the first output of the splitter, a first amplifier connected to an output of the first input-side two-port network, and a first output-side two-port network connected between an output of the first amplifier and the first input of the combiner. The peak amplifier includes a second input-side two-port network connected to the second output of the splitter, a second amplifier connected to the output of the second input-side two-port network, and a second output-side two-port network connected between an output of the second amplifier and the second input of the combiner.
    Type: Application
    Filed: February 21, 2017
    Publication date: June 8, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazutaka TAKAGI, Naotaka TOMITA
  • Patent number: 9590562
    Abstract: A semiconductor amplifier bias circuit includes a first transmission line, a first grounded capacitor, a second transmission line and a power supply terminal. The first transmission line is connected to an output end part of the output matching circuit and the external load. The second transmission line includes one end part connected to the first transmission line and the other end part connected to the first grounded shunt capacitor. An electrical length of the second transmission line is approximately 90° at a center frequency of a band. The one end part is connected to the first transmission line at a position apart from the output end part by an electrical length of approximately 45° at the center frequency. The power supply terminal is connected to a connection point of the first grounded shunt capacitor and the other end part of the second transmission line.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: March 7, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazutaka Takagi
  • Publication number: 20170062576
    Abstract: A high frequency semiconductor device includes a stacked body, a gate electrode, a source electrode and a drain electrode. The gate electrode includes a bending gate part and a straight gate part. The bending gate part is extended in a zigzag shape and has first and second outer edges. The source electrode includes a bending source part and a straight source part. The bending source part has an outer edge spaced by a first distance from the first outer edge of the bending gate part along a normal direction. The drain electrode includes a bending drain part and a straight drain part. The bending drain part has an outer edge spaced by a second distance from the second outer edge of the bending gate part along the normal direction.
    Type: Application
    Filed: August 17, 2016
    Publication date: March 2, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Kazutaka TAKAGI
  • Patent number: 9576737
    Abstract: Certain embodiments provide a parallel capacitor including a substrate configured by a dielectric, upper electrodes, and a lower electrode. The upper electrodes are provided in an upper electrode region on a surface of the substrate. The lower electrode is provided on an entire surface of a lower electrode region including a region corresponding to the upper electrode region of an underside of the substrate, the lower electrode region being wider than the region. A single-operation capacity of each capacitor on both ends is smaller than the single-operation capacity of a capacitor in a center portion. The capacitors on the both ends are configured by the upper electrodes arranged on both ends of the substrate, the lower electrode, and the substrate. The capacitor in the center portion is configured by the upper electrode arranged in a center portion of the substrate, the lower electrode, and the substrate.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: February 21, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazutaka Takagi
  • Patent number: 9536843
    Abstract: According to one embodiment, a semiconductor package includes: a first metal body on which a part of a waveguide structure is formed; a second metal body including a mounting area for a semiconductor device and disposed on the first metal body; a line substrate on which a signal transmission line configured to communicate a waveguide with the semiconductor device mounted on the mounting area is formed; and a lid body disposed at a position facing the first metal body, interposing the second metal body and the line substrate. The lid body is made of resin, on which a structure corresponding to another waveguide structure on an extension of the waveguide structure in the first metal body is formed. The structure includes a metal-coated inner wall surface.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: January 3, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazutaka Takagi
  • Patent number: 9478653
    Abstract: A field effect transistor includes multi-finger electrodes, a gate terminal electrode, a drain terminal electrode, a source terminal and a source terminal electrode. Each of the multi-finger electrodes includes two finger gate electrodes, a finger drain electrode, and at least two finger source electrodes. Finger electrodes are arranged so as to intersect with the first straight line at an angle of approximately +45 degrees and approximately ?45 degrees alternately. The gate terminal electrode commonly bundles and connects the finger gate electrodes of two adjacent cell regions. The drain terminal electrode commonly bundles and connects the finger drain electrodes of two adjacent cell regions. And the source terminal electrode commonly bundles and connects the finger source electrodes of two adjacent cell regions. The gate terminal electrodes and the drain terminal electrodes are alternately provided in a connecting region of the multi-finger electrodes of two adjacent cell regions.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: October 25, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazutaka Takagi
  • Publication number: 20160261236
    Abstract: According to one embodiment, a high-frequency amplifier includes an active element and an output matching circuit. The active element is provided on a substrate. The active element is configured to amplify a signal having a frequency band. The active element includes a cell region. The output matching circuit is connected to the active element. The output matching circuit includes a wire, a transmission line and an output terminal. The wire includes an input end and an output end. The input end of the wire is connected to an output part of the cell region of the active element. The transmission line is provided on the substrate. The transmission line includes an input part and an output part. The input part of the transmission line is connected to the output end of the wire. The output terminal is provided on the substrate.
    Type: Application
    Filed: February 10, 2016
    Publication date: September 8, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kenta KURODA, Kazutaka TAKAGI
  • Publication number: 20160218676
    Abstract: According to one embodiment, a high-frequency semiconductor amplifier includes an input terminal, an input matching circuit, a high-frequency semiconductor amplifying element, an output matching circuit and an output terminal. The input terminal is inputted with a fundamental signal. The fundamental signal has a first frequency band and a first center frequency in the first frequency band. The input matching circuit includes an input end and an output end. The input end of the input matching circuit is connected to the input terminal. The high-frequency semiconductor amplifying element includes an input end and an output end. The input end of the high-frequency semiconductor amplifying element is connected to the output end of the input matching circuit. The high-frequency semiconductor amplifying element is configured to amplify the fundamental signal.
    Type: Application
    Filed: January 27, 2016
    Publication date: July 28, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kazutaka TAKAGI, Yukio TAKAHASHI