Patents by Inventor Kazutaka Takeuchi

Kazutaka Takeuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8637588
    Abstract: An optical synthetic resin composed of: a synthetic resin; and fine particles dispersed in the synthetic resin at a ratio of 0.1 vol % or more to 50 vol % or less, each having a maximum length of 1 nm or more to 30 nm or less, in which part of surfaces of the fine particles are modified with functional groups which themselves repel each other, and a distance between two arbitrary adjacent fine particles among the fine particles is in a range of 0.1 nm or more to 500 nm or less. The two arbitrary adjacent fine particles attract each other with an intermolecular force, thereby making it possible to provide an optical composite deviating from an additivity range.
    Type: Grant
    Filed: October 3, 2006
    Date of Patent: January 28, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yasuhiro Tanaka, Katsumoto Hosokawa, Kazutaka Takeuchi
  • Patent number: 8015534
    Abstract: A method, apparatus, and recording medium including computer instructions for estimating the size of a core section of a semiconductor integrated circuit are provided. The method includes calculating a total net length of wires of nets and usable channel length of the core section by referring to circuit information and a layout parameter that are used to design the semiconductor integrated circuit. The method includes determining a size of the core section that satisfies conditions based on total net length and usable channel length.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: September 6, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Takashi Kurihara, Kazutaka Takeuchi
  • Patent number: 7911003
    Abstract: A semiconductor integrated circuit device including a semiconductor substrate and a MOS transistor having a source diffusion region and a drain diffusion region formed in the semiconductor substrate. A well is formed in the semiconductor substrate. A back gate diffusion region is defined in the vicinity of the source diffusion region or the drain diffusion region. The back gate diffusion region is of a conductivity type that is the same as that of the source diffusion region or the drain diffusion region. A potential control layer, arranged in the semiconductor substrate or under the well, controls the potential at the semiconductor substrate or the well.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: March 22, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Kazutaka Takeuchi
  • Publication number: 20090264552
    Abstract: Provided is an optical synthetic resin composed of: a synthetic resin; and fine particles dispersed in the synthetic resin at a ratio of 0.1 vol % or more to 50 vol % or less, each having a maximum length of 1 nm or more to 30 nm or less, in which part of surfaces of the fine particles are modified with functional groups which themselves repel each other, and a distance between two arbitrary adjacent fine particles among the fine particles is in a range of 0.1 nm or more to 500 nm or less. The two arbitrary adjacent fine particles attract each other with an intermolecular force, thereby making it possible to provide an optical composite deviating from an additivity range.
    Type: Application
    Filed: October 3, 2006
    Publication date: October 22, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Yasuhiro Tanaka, Katsumoto Hosokawa, Kazutaka Takeuchi
  • Publication number: 20090064066
    Abstract: A method, apparatus, and recording medium including computer instructions for estimating the size of a core section of a semiconductor integrated circuit are provided. The method includes calculating a total net length of wires of nets and usable channel length of the core section by referring to circuit information and a layout parameter that are used to design the semiconductor integrated circuit. The method includes determining a size of the core section that satisfies conditions based on total net length and usable channel length.
    Type: Application
    Filed: October 15, 2008
    Publication date: March 5, 2009
    Applicant: Fujitsu Limited
    Inventors: Takashi KURIHARA, Kazutaka TAKEUCHI
  • Patent number: 7454724
    Abstract: A method for accurately determining the provisional quantity and provisional locations of power supply pads prior to detailed layout of a semiconductor integrated circuit. The method decreases redesigning, shortens the design time, and lowers design costs. The method includes performing a power supply network analysis of the core section to obtain voltage values of the nodes, calculating current values between the nodes from the voltage values of the nodes and the resistances between the nodes, and calculating current values of the power supply pads from the current values between the nodes. The method further includes determining whether to eliminate or add a power supply pad depending on whether the current value of each power supply pad exceeds the current capacity of an associated IO buffer.
    Type: Grant
    Filed: April 14, 2004
    Date of Patent: November 18, 2008
    Assignee: Fujitsu Limited
    Inventors: Takashi Kurihara, Kazutaka Takeuchi
  • Publication number: 20070228474
    Abstract: A semiconductor integrated circuit device including a semiconductor substrate and a MOS transistor having a source diffusion region and a drain diffusion region formed in the semiconductor substrate. A well is formed in the semiconductor substrate. A back gate diffusion region is defined in the vicinity of the source diffusion region or the drain diffusion region. The back gate diffusion region is of a conductivity type that is the same as that of the source diffusion region or the drain diffusion region. A potential control layer, arranged in the semiconductor substrate or under the well, controls the potential at the semiconductor substrate or the well.
    Type: Application
    Filed: August 30, 2006
    Publication date: October 4, 2007
    Applicant: FUJITSU LIMITED
    Inventor: Kazutaka Takeuchi
  • Patent number: 7178116
    Abstract: A method for designing a semiconductor integrated circuit includes performing logic design and physical design. The method estimates whether logic design data generated in the logic design is appropriate for use in the physical design before the physical design is started. The result of the estimation is fed back to the logic design and reflected in the logic design data.
    Type: Grant
    Filed: October 20, 2004
    Date of Patent: February 13, 2007
    Assignee: Fujitsu Limited
    Inventor: Kazutaka Takeuchi
  • Patent number: 7048821
    Abstract: A transport belt comprising a base member layer formed of a film comprised of a thermoplastic material and wound in the shape of a belt, and a plurality of electrodes arranged at given intervals in the shape of comb teeth on the outer periphery or inner periphery of the first base member layer. The electrodes each comprise a linear film comprised of a thermoplastic material and are joined by heating onto the first base member layer. This transport belt is improved in attraction of recording mediums and enables transport of the recording mediums in a high accuracy. Also disclosed are a process for its manufacture and an image-forming apparatus making use of the same.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: May 23, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazutaka Takeuchi, Shoichi Shimura, Osamu Kanome
  • Patent number: 7007943
    Abstract: The absorption belt capable of absorbing an object such as a printing medium P includes an insulating layer, a plurality of positive electrodes and a plurality of negative electrodes arranged alternately on the insulating layer, and a plurality of absorption layers for covering the electrodes. The absorption layers have different volume resistivities.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: March 7, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Osamu Kanome, Kazutaka Takeuchi
  • Publication number: 20060005152
    Abstract: A method for designing a semiconductor integrated circuit includes performing logic design and physical design. The method estimates whether logic design data generated in the logic design is appropriate for use in the physical design before the physical design is started. The result of the estimation is fed back to the logic design and reflected in the logic design data.
    Type: Application
    Filed: October 20, 2004
    Publication date: January 5, 2006
    Applicant: Fujitsu Limited
    Inventor: Kazutaka Takeuchi
  • Patent number: 6962637
    Abstract: A method of manufacturing a tubular film includes the steps of: winding a thermoplastic sheet film on a columnar member with at least two turns so that leading and trailing ends of the film are placed approximately on one normal line of an outer surface of the columnar member without overlapping each other; fitting a tubular molding member on the wound film; and connecting the leading and trailing ends of the film by heating at least the film, thereby forming the sheet film into the tubular film. The resulting tubular film has a high film thickness uniformity and suitable for a fixing film of an image forming apparatus.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: November 8, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazutaka Takeuchi, Shoichi Shimura
  • Publication number: 20050050502
    Abstract: A method for accurately determining the provisional quantity and provisional locations of power supply pads prior to detailed layout of a semiconductor integrated circuit. The method decreases redesigning, shortens the design time, and lowers design costs. The method includes performing a power supply network analysis of the core section to obtain voltage values of the nodes, calculating current values between the nodes from the voltage values of the nodes and the resistances between the nodes, and calculating current values of the power supply pads from the current values between the nodes. The method further includes determining whether to eliminate or add a power supply pad depending on whether the current value of each power supply pad exceeds the current capacity of an associated IO buffer.
    Type: Application
    Filed: April 14, 2004
    Publication date: March 3, 2005
    Applicant: Fujitsu Limited
    Inventors: Takashi Kurihara, Kazutaka Takeuchi
  • Publication number: 20040221949
    Abstract: A transport belt comprising a base member layer formed of a film comprised of a thermoplastic material and wound in the shape of a belt, and a plurality of electrodes arranged at given intervals in the shape of comb teeth on the outer periphery or inner periphery of the first base member layer. The electrodes each comprise a linear film comprised of a thermoplastic material and are joined by heating onto the first base member layer. This transport belt is improved in attraction of recording mediums and enables transport of the recording mediums in a high accuracy. Also disclosed are a process for its manufacture and an image-forming apparatus making use of the same.
    Type: Application
    Filed: June 16, 2004
    Publication date: November 11, 2004
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Kazutaka Takeuchi, Shoichi Shimura, Osamu Kanome
  • Publication number: 20040060467
    Abstract: The absorption belt capable of absorbing an object such as a printing medium P includes an insulating layer, a plurality of positive electrodes and a plurality of negative electrodes arranged alternately on the insulating layer, and a plurality of absorption layers for covering the electrodes. The absorption layers have different volume resistivities.
    Type: Application
    Filed: September 26, 2003
    Publication date: April 1, 2004
    Applicant: Canon Kabushiki Kaisha
    Inventors: Osamu Kanome, Kazutaka Takeuchi
  • Publication number: 20020142120
    Abstract: A transport belt comprising a base member layer formed of a film comprised of a thermoplastic material and wound in the shape of a belt, and a plurality of electrodes arranged at given intervals in the shape of comb teeth on the outer periphery or inner periphery of the first base member layer. The electrodes each comprise a linear film comprised of a thermoplastic material and are joined by heating onto the first base member layer. This transport belt is improved in attraction of recording mediums and enables transport of the recording mediums in a high accuracy. Also disclosed are a process for its manufacture and an image-forming apparatus making use of the same.
    Type: Application
    Filed: March 26, 2002
    Publication date: October 3, 2002
    Applicant: Canon Kabushiki Kaisha
    Inventors: Kazutaka Takeuchi, Shoichi Shimura, Osamu Kanome
  • Patent number: 6453143
    Abstract: In a transfer belt, serving as the endless belt, a groove is formed so as to set a side surface of the rib member at a position separated by a distance A from a lateral-direction end of the transfer belt. The distance A is longer than a distance X between a first end and a second end of the rib member.
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: September 17, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kazutaka Takeuchi
  • Patent number: 6375358
    Abstract: A shaft integral with a rotary polygon mirror is fitted in a sleeve so as to be rotatable, and the bearing clearance is filled with a lubricant. The lubricant comprises a base oil comprising a mixed oil consisting of a plurality of components whose vapor pressures are equal or close to each other. Suitably combining components of different viscosities makes it possible to prepare the lubricant so as to have such a viscosity to match with the bearing characteristics. Selection of components having a little difference in vapor pressure prevents viscosity change due to volatilization of a specific component. Thus, the viscosity change of the lubricant in the bearing clearance is prevented.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: April 23, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ichiro Maekawa, Kazutaka Takeuchi
  • Publication number: 20020001689
    Abstract: It is an object of this invention to provide a tubular film having a high film thickness uniformity and suitable for a fixing film of an image forming apparatus. To achieve this object, a thermoplastic sheet film is so wound that the leading and trailing ends of the film partially overlap each other to form overlapping portions, and the wound film is heated between a core member and a tubular molding member.
    Type: Application
    Filed: August 23, 2001
    Publication date: January 3, 2002
    Inventors: Kazutaka Takeuchi, Shoichi Shimura
  • Publication number: 20020001492
    Abstract: The durability of an endless belt where at least one rib member, having ends, for preventing skew of the endless belt is mounted is improved. In a transfer belt, serving as the endless belt, a groove is formed so as to set a side surface of the rib member at a position separated by a distance A from a lateral-direction end of the transfer belt. The distance A is longer than a distance X between a first end and a second end of the rib member.
    Type: Application
    Filed: May 22, 2001
    Publication date: January 3, 2002
    Inventor: Kazutaka Takeuchi