Patents by Inventor Kazutero Nanba

Kazutero Nanba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090102531
    Abstract: [Problems] To provide a semiconductor integrated circuit by which what has been referred to as two-pattern test is made possible without greatly increasing an occupying area. [Means for Solving Problems] the semiconductor integrated circuit is provided with a plurality of flip-flop circuits and selectors corresponding to each flip-flop circuit. Each flip-flop circuit is provided with a master latch and a slave latch connected to the master latch. The selector is electrically connected with the master latch of the flip-flop circuit to which the selector corresponds, and is also connected with the master latch of the flip-flop circuit other than the one to which the selector corresponds.
    Type: Application
    Filed: January 5, 2006
    Publication date: April 23, 2009
    Inventors: Kazutero Nanba, Hideo Ito