Patents by Inventor Kazuto Ogawa

Kazuto Ogawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9978515
    Abstract: An electronic component unit includes a substrate including principal surfaces opposing each other and side surfaces between the principal surfaces, and components mounted on the principal surface of the substrate. The side surfaces include first side surfaces formed before the components are mounted and second side surfaces formed after the components are mounted. As viewed from a line normal to the principal surface of the substrate, distances between the first side surfaces and the components are different from distances between the second side surfaces and the components.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: May 22, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kazuto Ogawa, Isao Kato
  • Patent number: 9932473
    Abstract: An encapsulating resin composition contains a thermosetting resin component, a curing accelerator, an inorganic filler, an ion trapping agent, and an aromatic monocarboxylic acid having one or more electron-withdrawing functional groups selected from a nitro group and a cyano group. The encapsulating resin composition is solid at 25° C., and has a sulfur content, measured by X-ray fluorescence analysis, of 0.1 mass % or less in terms of SO3.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: April 3, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Emi Iwatani, Kazuto Ogawa, Kota Ishikawa, Takayuki Tsuji
  • Patent number: 9839135
    Abstract: A method of producing electronic components each including a substrate-type terminal and a device connected to the substrate-type terminal including a substrate body with first and second principal surfaces opposite to each other and an electrode configured to be connected to the device on the first principal surface, wherein the device is disposed on the first principal surface, includes forming grooves in a substrate from one of the first and second principal surfaces of the substrate such that the substrate is divided into the substrate-type terminals, the grooves each having a depth less than a thickness of the substrate, cutting the substrate from another principal surface opposite to the principal surface of the substrate body such that the grooves penetrate through the substrate in a thickness direction thereof, and mounting the device on each of the first principal surfaces.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: December 5, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kazuto Ogawa, Takashi Watanabe, Junya Shimakawa, Mitsuhide Kato
  • Patent number: 9801283
    Abstract: A method of producing electronic components each including a substrate-type terminal and a device connected to the substrate-type terminal is performed such that the substrate-type terminal includes a substrate body including a rectangular or substantially rectangular first principal surface extending in first and second directions perpendicular or substantially perpendicular to each other. The device is disposed on the first principal surface. The method includes supporting a substrate that is to become an assembly in which the plurality of substrate-type terminals are arranged in a matrix using a first support member, cutting the substrate supported by the first support member into the plurality of substrate-type terminals, and mounting the device on the first principal surface of the substrate body of each of the plurality of substrate-type terminals obtained by cutting.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: October 24, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kazuto Ogawa, Takashi Watanabe, Junya Shimakawa
  • Patent number: 9633922
    Abstract: A sealing epoxy resin composition contains a phosphonium salt shown in Formula (1), an epoxy resin, a hardening agent, and an inorganic filler. In Formula (1), R1-R3 each represent an aryl group having 6 to 12 carbon atoms, R4 represents an alkyl group having 1 to 4 carbon atoms, R6 and R8 each represent either a carboxyl group or a hydroxyl group, R5 and R7 each represent either hydrogen or an alkyl group having 1 to 4 carbon atoms, R9 and R11 represent hydrogen, R10 represents either a carboxyl group or a hydroxyl group, and the relation of r?1 is satisfied.
    Type: Grant
    Filed: May 14, 2016
    Date of Patent: April 25, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kazuto Ogawa, Kyoko Nishidono, Emi Iwatani, Keigo Takagi
  • Publication number: 20160289443
    Abstract: An encapsulating resin composition contains a thermosetting resin component, a curing accelerator, an inorganic filler, an ion trapping agent, and an aromatic monocarboxylic acid having one or more electron-withdrawing functional groups selected from a nitro group and a cyano group. The encapsulating resin composition is solid at 25° C., and has a sulfur content, measured by X-ray fluorescence analysis, of 0.1 mass % or less in terms of SO3.
    Type: Application
    Filed: March 21, 2016
    Publication date: October 6, 2016
    Inventors: EMI IWATANI, KAZUTO OGAWA, KOTA ISHIKAWA, TAKAYUKI TSUJI
  • Patent number: 9449838
    Abstract: In a semiconductor device manufacturing method, a target object including a multilayer film and a mask formed on the multilayer film is prepared in a processing chamber of a plasma processing apparatus. The multilayer film is formed by alternately stacking a silicon oxide film and a silicon nitride film. The multilayer film is etched by supplying a processing gas containing hydrogen gas, hydrogen bromide gas, nitrogen trifluoride gas and at least one of hydrocarbon gas, fluorohydrocarbon gas and fluorocarbon gas into the processing chamber of the plasma processing apparatus and generating a plasma of the processing gas in the processing chamber.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: September 20, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kazuto Ogawa, Kazuki Narishige, Takanori Sato
  • Publication number: 20160260645
    Abstract: A sealing epoxy resin composition contains a phosphonium salt shown in Formula (1), an epoxy resin, a hardening agent, and an inorganic filler. In Formula (1), R1-R3 each represent an aryl group having 6 to 12 carbon atoms, R4 represents an alkyl group having 1 to 4 carbon atoms, R6 and R8 each represent either a carboxyl group or a hydroxyl group, R5 and R7 each represent either hydrogen or an alkyl group having 1 to 4 carbon atoms, R9 and R11 represent hydrogen, R10 represents either a carboxyl group or a hydroxyl group, and the relation of r?1 is satisfied.
    Type: Application
    Filed: May 14, 2016
    Publication date: September 8, 2016
    Inventors: KAZUTO OGAWA, KYOKO NISHIDONO, EMI IWATANI, KEIGO TAKAGI
  • Patent number: 9396960
    Abstract: A main etching process of forming a recess portion in a multilayer film having a laminated film where a first film and a second film having different relative permitivities are alternately formed on a base silicon film to a preset depth and an over etching process of forming the recess portion until the base silicon film is exposed are performed by introducing a processing gas including a CF-based gas and an oxygen gas and by performing a plasma etching process. In the over etching process, a first over etching process where a flow rate ratio of the oxygen gas to the CF-based gas is increased as compared to the main etching process and a second over etching process where the flow rate ratio of the oxygen gas to the CF-based gas is reduced as compared to the first over etching process are repeatedly performed two or more times.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: July 19, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kazuto Ogawa, Akira Nakagawa, Hideki Konishi
  • Publication number: 20150287618
    Abstract: Provided are a plasma processing method and a plasma processing apparatus which may form a protective film on the surface of an etching stop layer and suppress clogging of openings of holes when etching an oxide layer are provided. The plasma processing method forms a plurality of holes having different depths in multi-layered films that include an oxide layer, a plurality of etching stop layers made of tungsten, and a mask layer. The plasma processing method includes an etching process in which a processing gas is supplied to generate plasma such that etching is performed from the top surface of the oxide layer to the plurality of etching stop layers so as to form hole having different depths in the oxide layer. Here, the processing gas includes a fluorocarbon-based gas, a rare gas, oxygen, and nitrogen.
    Type: Application
    Filed: June 23, 2015
    Publication date: October 8, 2015
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hiroie MATSUMOTO, Kazuto OGAWA
  • Publication number: 20150243521
    Abstract: A main etching process of forming a recess portion in a multilayer film having a laminated film where a first film and a second film having different relative permitivities are alternately formed on a base silicon film to a preset depth and an over etching process of forming the recess portion until the base silicon film is exposed are performed by introducing a processing gas including a CF-based gas and an oxygen gas and by performing a plasma etching process. In the over etching process, a first over etching process where a flow rate ratio of the oxygen gas to the CF-based gas is increased as compared to the main etching process and a second over etching process where the flow rate ratio of the oxygen gas to the CF-based gas is reduced as compared to the first over etching process are repeatedly performed two or more times.
    Type: Application
    Filed: October 31, 2013
    Publication date: August 27, 2015
    Inventors: Kazuto Ogawa, Akira Nakagawa, Hideki Konishi
  • Publication number: 20150228500
    Abstract: In a semiconductor device manufacturing method, a target object including a multilayer film and a mask formed on the multilayer film is prepared in a processing chamber of a plasma processing apparatus. The multilayer film is formed by alternately stacking a silicon oxide film and a silicon nitride film. The multilayer film is etched by supplying a processing gas containing hydrogen gas, hydrogen bromide gas, nitrogen trifluoride gas and at least one of hydrocarbon gas, fluorohydrocarbon gas and fluorocarbon gas into the processing chamber of the plasma processing apparatus and generating a plasma of the processing gas in the processing chamber.
    Type: Application
    Filed: April 24, 2015
    Publication date: August 13, 2015
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kazuto OGAWA, Kazuki NARISHIGE, Takanori SATO
  • Patent number: 9099285
    Abstract: Provided are a plasma processing method and a plasma processing apparatus which may form a protective film on the surface of an etching stop layer and suppress clogging of openings of holes when etching an oxide layer are provided. The plasma processing method forms a plurality of holes having different depths in multi-layered films that include an oxide layer, a plurality of etching stop layers made of tungsten, and a mask layer. The plasma processing method includes an etching process in which a processing gas is supplied to generate plasma such that etching is performed from the top surface of the oxide layer to the plurality of etching stop layers so as to form hole having different depths in the oxide layer. Here, the processing gas includes a fluorocarbon-based gas, a rare gas, oxygen, and nitrogen.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: August 4, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Hiroie Matsumoto, Kazuto Ogawa
  • Patent number: 9082720
    Abstract: A direction change of space formed in an etching target layer can be suppressed while maintaining an etching selectivity for the etching target layer against a mask. A semiconductor device manufacturing method MT includes exciting a first gas by supplying the first gas containing a fluorocarbon gas, a fluorohydrocarbon gas and an oxygen gas into a processing chamber 12 (ST2); and exciting a second gas by supplying the second gas containing an oxygen gas and a rare gas into the processing chamber (ST3), and a cycle including the exciting of the first gas (ST2) and the exciting of the second gas (ST3) is repeated multiple times.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: July 14, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kazuto Ogawa, Katsunori Hirai
  • Patent number: 9039913
    Abstract: In a semiconductor device manufacturing method, a target object including a multilayer film and a mask formed on the multilayer film is prepared in a processing chamber of a plasma processing apparatus. The multilayer film is formed by alternately stacking a silicon oxide film and a silicon nitride film. The multilayer film is etched by supplying a processing gas containing hydrogen gas, hydrogen bromide gas, nitrogen trifluoride gas and at least one of hydrocarbon gas, fluorohydrocarbon gas and fluorocarbon gas into the processing chamber of the plasma processing apparatus and generating a plasma of the processing gas in the processing chamber.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: May 26, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kazuto Ogawa, Kazuki Narishige, Takanori Sato
  • Publication number: 20150096792
    Abstract: An electronic component unit includes a substrate including principal surfaces opposing each other and side surfaces between the principal surfaces, and components mounted on the principal surface of the substrate. The side surfaces include first side surfaces formed before the components are mounted and second side surfaces formed after the components are mounted. As viewed from a line normal to the principal surface of the substrate, distances between the first side surfaces and the components are different from distances between the second side surfaces and the components.
    Type: Application
    Filed: December 12, 2014
    Publication date: April 9, 2015
    Inventors: Kazuto OGAWA, Isao KATO
  • Publication number: 20150056817
    Abstract: A direction change of space formed in an etching target layer can be suppressed while maintaining an etching selectivity for the etching target layer against a mask. A semiconductor device manufacturing method MT includes exciting a first gas by supplying the first gas containing a fluorocarbon gas, a fluorohydrocarbon gas and an oxygen gas into a processing chamber 12 (ST2); and exciting a second gas by supplying the second gas containing an oxygen gas and a rare gas into the processing chamber (ST3), and a cycle including the exciting of the first gas (ST2) and the exciting of the second gas (ST3) is repeated multiple times.
    Type: Application
    Filed: August 25, 2014
    Publication date: February 26, 2015
    Inventors: Kazuto Ogawa, Katsunori Hirai
  • Publication number: 20150037982
    Abstract: In a semiconductor device manufacturing method, a target object including a multilayer film and a mask formed on the multilayer film is prepared in a processing chamber of a plasma processing apparatus. The multilayer film is formed by alternately stacking a silicon oxide film and a silicon nitride film. The multilayer film is etched by supplying a processing gas containing hydrogen gas, hydrogen bromide gas, nitrogen trifluoride gas and at least one of hydrocarbon gas, fluorohydrocarbon gas and fluorocarbon gas into the processing chamber of the plasma processing apparatus and generating a plasma of the processing gas in the processing chamber.
    Type: Application
    Filed: July 31, 2014
    Publication date: February 5, 2015
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kazuto OGAWA, Kazuki NARISHIGE, Takanori SATO
  • Publication number: 20150026973
    Abstract: A method of producing electronic components each including a substrate-type terminal and a device connected to the substrate-type terminal is performed such that the substrate-type terminal includes a substrate body including a rectangular or substantially rectangular first principal surface extending in first and second directions perpendicular or substantially perpendicular to each other. The device is disposed on the first principal surface. The method includes supporting a substrate that is to become an assembly in which the plurality of substrate-type terminals are arranged in a matrix using a first support member, cutting the substrate supported by the first support member into the plurality of substrate-type terminals, and mounting the device on the first principal surface of the substrate body of each of the plurality of substrate-type terminals obtained by cutting.
    Type: Application
    Filed: July 18, 2014
    Publication date: January 29, 2015
    Inventors: Kazuto OGAWA, Takashi WATANABE, Junya SHIMAKAWA
  • Publication number: 20150026972
    Abstract: A method of producing electronic components each including a substrate-type terminal and a device connected to the substrate-type terminal including a substrate body with first and second principal surfaces opposite to each other and an electrode configured to be connected to the device on the first principal surface, wherein the device is disposed on the first principal surface, includes forming grooves in a substrate from one of the first and second principal surfaces of the substrate such that the substrate is divided into the substrate-type terminals, the grooves each having a depth less than a thickness of the substrate, cutting the substrate from another principal surface opposite to the principal surface of the substrate body such that the grooves penetrate through the substrate in a thickness direction thereof, and mounting the device on each of the first principal surfaces.
    Type: Application
    Filed: July 16, 2014
    Publication date: January 29, 2015
    Inventors: Kazuto OGAWA, Takashi WATANABE, Junya SHIMAKAWA, Mitsuhide KATO