Patents by Inventor Kazutoshi Hohki

Kazutoshi Hohki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6418030
    Abstract: A multi-chip module includes bare IC chips mounted on respective areas of a printed wiring board. Outer electrode pads on the peripheries of the board are soldered to another printed wiring board such as a motherboard. Lead pads and the outer electrode pads are interconnected through a circuit pattern, through holes, and interstitial via holes. The circuit pattern is disposed on a die bonding surface of the bare IC chips for which insulation is not necessary.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: July 9, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayoshi Yamaguchi, Mitsutoshi Sawano, Kazutoshi Hohki
  • Patent number: 6147876
    Abstract: Bare IC chips (201 through 203) are mounted on respective areas (101 through 103) of a printed wiring board (100). The outer electrode pads (105) on the peripheries of the board (100) are soldered to another printed wiring board (1) such as a mother board. Lead pads (107) and the outer electrode pads (105) are interconnected through a circuit pattern (109), through holes (111) and interstitial via holes (112). The circuit pattern (109) is disposed on a die bonding surface of the bare IC chips (201 and 202) for which insulation is not necessary. A multi-chip module is thus completed.
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: November 14, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayoshi Yamaguchi, Mitsutoshi Sawano, Kazutoshi Hohki