Patents by Inventor Kazutoshi Kojima

Kazutoshi Kojima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10879359
    Abstract: A silicon carbide epitaxial wafer (10) of the present invention is a silicon carbide epitaxial wafer including: a silicon carbide substrate (1) and a silicon carbide layer (2) provided on a first principal plane (1A) of the silicon carbide substrate (1) and having a film thickness of 100 ?m or more, wherein a warpage amount of the silicon carbide epitaxial wafer is ?20 ?m or more and 20 ?m or less.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: December 29, 2020
    Inventors: Keiko Masumoto, Satoshi Segawa, Kazutoshi Kojima, Tomohisa Kato, Toshiyuki Ohno
  • Publication number: 20190333998
    Abstract: A high quality silicon carbide epitaxial wafer using a p-type silicon carbide single crystal substrate of low resistivity. The silicon carbide epitaxial wafer includes a p-type 4H—SiC single crystal substrate that has a first main surface having an off angle with respect to (0001) plane, and has a resistivity of less than 0.4 ?cm, and a silicon carbide epitaxial layer that is disposed on the first main surface of the p-type 4H—SiC single crystal substrate, in which an off direction of the off angle is the <01-10> direction.
    Type: Application
    Filed: December 19, 2018
    Publication date: October 31, 2019
    Inventors: Keiko MASUMOTO, Takashi MITANI, Kazuma ETO, Kazutoshi KOJIMA, Tomohisa KATO
  • Publication number: 20190273136
    Abstract: A silicon carbide epitaxial wafer (10) of the present invention is a silicon carbide epitaxial wafer including: a silicon carbide substrate (1) and a silicon carbide layer (2) provided on a first principal plane (1A) of the silicon carbide substrate (1) and having a film thickness of 100 ?m or more, wherein a warpage amount of the silicon carbide epitaxial wafer is ?20 ?m or more and 20 ?m or less.
    Type: Application
    Filed: February 20, 2019
    Publication date: September 5, 2019
    Inventors: Keiko MASUMOTO, Satoshi SEGAWA, Kazutoshi KOJIMA, Tomohisa KATO, Toshiyuki OHNO
  • Patent number: 10354867
    Abstract: A method for manufacturing an epitaxial wafer comprising a silicon carbide substrate and a silicon carbide voltage-blocking-layer, the method includes: epitaxially growing a buffer layer on the substrate, doping a main dopant for determining a conductivity type of the buffer layer and doping an auxiliary dopant for capturing minority carriers in the buffer layer at a doping concentration less than the doping concentration of the main dopant, so that the buffer layer enhances capturing and extinction of the minority carriers, the minority carriers flowing in a direction from the voltage-blocking-layer to the substrate, so that the buffer layer has a lower resistivity than the voltage-blocking-layer, and so that the buffer layer includes silicon carbide as a main component; and epitaxially growing the voltage-blocking-layer on the buffer layer.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: July 16, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hidekazu Tsuchida, Tetsuya Miyazawa, Yoshiyuki Yonezawa, Tomohisa Kato, Kazutoshi Kojima, Takeshi Tawara, Akihiro Otsuki
  • Publication number: 20180012758
    Abstract: A method for manufacturing an epitaxial wafer comprising a silicon carbide substrate and a silicon carbide voltage-blocking-layer, the method includes: epitaxially growing a buffer layer on the substrate, doping a main dopant for determining a conductivity type of the buffer layer and doping an auxiliary dopant for capturing minority carriers in the buffer layer at a doping concentration less than the doping concentration of the main dopant, so that the buffer layer enhances capturing and extinction of the minority carriers, the minority carriers flowing in a direction from the voltage-blocking-layer to the substrate, so that the buffer layer has a lower resistivity than the voltage-blocking-layer, and so that the buffer layer includes silicon carbide as a main component; and epitaxially growing the voltage-blocking-layer on the buffer layer.
    Type: Application
    Filed: September 22, 2017
    Publication date: January 11, 2018
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Hidekazu TSUCHIDA, Tetsuya MIYAZAWA, Yoshiyuki YONEZAWA, Tomohisa KATO, Kazutoshi KOJIMA, Takeshi TAWARA, Akihiro OTSUKl
  • Patent number: 9587326
    Abstract: To provide silicon carbide epitaxial wafer in which occurrence of giant step bunchings (GSBs) caused by basal plane dislocations (BPDs) that occur during hydrogen etching is suppressed on low off-angle silicon carbide substrate to decrease surface defect density of epitaxially grown layer to allow formation of silicon carbide semiconductor device having high reliability, method for manufacturing the wafer, and apparatus for manufacturing the wafer, and silicon carbide semiconductor device having the wafer. A silicon carbide epitaxial wafer of the present invention is such that epitaxially grown layer is disposed on silicon carbide substrate which has ?-type crystal structure and in which (0001) Si face is tilted at greater than 0° and less than 5°, wherein surface defect density of the epitaxially grown layer based on giant step bunching caused by basal plane dislocation on substrate surface of the silicon carbide substrate is ?20/cm2.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: March 7, 2017
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Keiko Masumoto, Kazutoshi Kojima, Kentaro Tamura
  • Patent number: 9496345
    Abstract: The present invention provides a semiconductor structure which includes at least a p-type silicon carbide single crystal layer having an ?-type crystal structure, containing aluminum at impurity concentration of 1×1019 cm?3 or higher, and having thickness of 50 ?m or greater. Further provided is a method for producing the semiconductor structure of the present invention which method includes at least epitaxial growth step of introducing silicon carbide source and aluminum source and epitaxially growing p-type silicon carbide single crystal layer over a base layer made of silicon carbide single crystal having ?-type crystal structure, wherein the epitaxial growth step is performed at temperature conditions of from 1,500° C. to 1,700° C., and pressure conditions of from 5×103 Pa to 25×103 Pa.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: November 15, 2016
    Assignees: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY, CENTRAL RESEARCH INSTITUTE OF ELECTRIC POWER INDUSTRY
    Inventors: Kazutoshi Kojima, Shiyang Ji, Tetsuya Miyazawa, Hidekazu Tsuchida, Koji Nakayama, Tetsuro Hemmi, Katsunori Asano
  • Publication number: 20160168751
    Abstract: To provide silicon carbide epitaxial wafer in which occurrence of giant step bunchings (GSBs) caused by basal plane dislocations (BPDs) that occur during hydrogen etching is suppressed on low off-angle silicon carbide substrate to decrease surface defect density of epitaxially grown layer to allow formation of silicon carbide semiconductor device having high reliability, method for manufacturing the wafer, and apparatus for manufacturing the wafer, and silicon carbide semiconductor device having the wafer. A silicon carbide epitaxial wafer of the present invention is such that epitaxially grown layer is disposed on silicon carbide substrate which has ?-type crystal structure and in which (0001) Si face is tilted at greater than 0° and less than 5°, wherein surface defect density of the epitaxially grown layer based on giant step bunching caused by basal plane dislocation on substrate surface of the silicon carbide substrate is ?20/cm2.
    Type: Application
    Filed: February 20, 2014
    Publication date: June 16, 2016
    Inventors: Keiko MASUMOTO, Kazutoshi KOJIMA, Kentaro TAMURA
  • Publication number: 20150214306
    Abstract: The present invention provides a semiconductor structure which includes at least a p-type silicon carbide single crystal layer having an ?-type crystal structure, containing aluminum at impurity concentration of 1×1019 cm?3 or higher, and having thickness of 50 ?m or greater. Further provided is a method for producing the semiconductor structure of the present invention which method includes at least epitaxial growth step of introducing silicon carbide source and aluminum source and epitaxially growing p-type silicon carbide single crystal layer over a base layer made of silicon carbide single crystal having ?-type crystal structure, wherein the epitaxial growth step is performed at temperature conditions of from 1,500° C. to 1,700° C., and pressure conditions of from 5×103 Pa to 25×103 Pa.
    Type: Application
    Filed: July 31, 2013
    Publication date: July 30, 2015
    Inventors: Kazutoshi Kojima, Shiyang Ji, Tetsuya Miyazawa, Hidekazu Tsuchida, Koji Nakayama, Tetsuro Hemmi, Katsunori Asano
  • Patent number: 9053834
    Abstract: A silicon carbide single crystal includes nitrogen as a dopant and aluminum as a dopant. A nitrogen concentration is 2×1019 cm?3 or higher and a ratio of an aluminum concentration to the nitrogen concentration is within a range of 5% to 40%.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: June 9, 2015
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Fusao Hirose, Jun Kojima, Kazutoshi Kojima, Tomohisa Kato, Ayumu Adachi, Koichi Nishikawa
  • Patent number: 8716718
    Abstract: An epitaxial SiC single crystal substrate including a SiC single crystal wafer whose main surface is a c-plane or a surface that inclines a c-plane with an angle of inclination that is more than 0 degree but less than 10 degrees, and SiC epitaxial film that is formed on the main surface of the SiC single crystal wafer, wherein the dislocation array density of threading edge dislocation arrays that are formed in the SiC epitaxial film is 10 arrays/cm2 or less.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: May 6, 2014
    Assignees: Showa Denko K.K., National Institute of Advanced Industrial Science and Technology, Central Research Institute of Electric Power Industry
    Inventors: Kenji Momose, Michiya Odawara, Keiichi Matsuzawa, Hajime Okumura, Kazutoshi Kojima, Yuuki Ishida, Hidekazu Tsuchida, Isaho Kamata
  • Publication number: 20130009170
    Abstract: An epitaxial SiC single crystal substrate including a SiC single crystal wafer whose main surface is a c-plane or a surface that inclines a c-plane with an angle of inclination that is more than 0 degree but less than 10 degrees, and SiC epitaxial film that is formed on the main surface of the SiC single crystal wafer, wherein the dislocation array density of threading edge dislocation arrays that are formed in the SiC epitaxial film is 10 arrays/cm2 or less.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 10, 2013
    Applicants: SHOWA DENKO K.K., CENTRAL RESEARCH INSTITUTE OF ELECTRIC POWER INDUSTRY, NATIONAL INSTITUTE OF ADVANCE INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Kenji MOMOSE, Michiya ODAWARA, Keiichi MATSUZAWA, Hajime OKUMURA, Kazutoshi KOJIMA, Yuuki ISHIDA, Hidekazu TSUCHIDA, Isaho KAMATA
  • Patent number: 8293623
    Abstract: An epitaxial SiC single crystal substrate including a SiC single crystal wafer whose main surface is a c-plane or a surface that inclines a c-plane with an angle of inclination that is more than 0 degree but less than 10 degrees, and SiC epitaxial film that is formed on the main surface of the SiC single crystal wafer, wherein the dislocation array density of threading edge dislocation arrays that are formed in the SiC epitaxial film is 10 arrays/cm2 or less.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: October 23, 2012
    Assignees: Showa Denko K.K., National Institute of Advanced Industrial Science and Technology, Central Research Institute of Electric Power Industry
    Inventors: Kenji Momose, Michiya Odawara, Keiichi Matsuzawa, Hajime Okumura, Kazutoshi Kojima, Yuuki Ishida, Hidekazu Tsuchida, Isaho Kamata
  • Publication number: 20120025153
    Abstract: A silicon carbide single crystal includes nitrogen as a dopant and aluminum as a dopant. A nitrogen concentration is 2×1019 cm?3 or higher and a ratio of an aluminum concentration to the nitrogen concentration is within a range of 5% to 40%.
    Type: Application
    Filed: July 29, 2011
    Publication date: February 2, 2012
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Fusao Hirose, Jun Kojima, Kazutoshi Kojima, Tomohisa Kato, Ayumu Adachi, Koichi Nishikawa
  • Publication number: 20110006309
    Abstract: An epitaxial SiC single crystal substrate including a SiC single crystal wafer whose main surface is a c-plane or a surface that inclines a c-plane with an angle of inclination that is more than 0 degree but less than 10 degrees, and SiC epitaxial film that is formed on the main surface of the SiC single crystal wafer, wherein the dislocation array density of threading edge dislocation arrays that are formed in the SiC epitaxial film is 10 arrays/cm2 or less.
    Type: Application
    Filed: September 12, 2008
    Publication date: January 13, 2011
    Applicant: SHOWA DENKO K.K.
    Inventors: Kenji Momose, Michiya Odawara, Keiichi Matsuzawa, Hajime Okumura, Kazutoshi Kojima, Yuuki Ishida, Hidekazu Tsuchida, Isaho Kamata
  • Patent number: 7635868
    Abstract: Provided is a silicon carbide epitaxial wafer which is formed on a substrate that is less than 1° off from the {0001} surface of silicon carbide having an ?-type crystal structure, wherein the crystal defects in the SiC epitaxial wafer are reduced while the flatness of the surface thereof is improved.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: December 22, 2009
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Kazutoshi Kojima, Satoshi Kuroda, Hajime Okumura
  • Patent number: 7265388
    Abstract: A semiconductor device formed on a silicon carbide semiconductor substrate comprises an epitaxial layer formed on a surface sloping (or inclining) by 0 to less than 1 degree from a (000-1) face of the silicon carbide semiconductor substrate, wherein at least one of a P type semiconductor area or an N type semiconductor area is selectively formed in the epitaxial layer by ion implantation, a metal electrode is formed so as to contact a surface layer of the P type semiconductor area or the N type semiconductor area, a rectification function is shown between the metal electrode and the P type semiconductor area or the N type semiconductor area, and the semiconductor device is formed on the silicon carbide semiconductor substrate of a Schottky barrier diode or a PN type diode.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: September 4, 2007
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Kenji Fukuda, Ryouji Kosugi, Shinsuke Harada, Junji Senzaki, Kazutoshi Kojima, Satoshi Kuroda
  • Publication number: 20070001175
    Abstract: Provided is a silicon carbide epitaxial wafer which is formed on a substrate that is less than 1° off from the {0001} surface of silicon carbide having an ?-type crystal structure, wherein the crystal defects in the SiC epitaxial wafer are reduced while the flatness of the surface thereof is improved.
    Type: Application
    Filed: August 19, 2004
    Publication date: January 4, 2007
    Inventors: Kazutoshi Kojima, Satoshi Kuroda, Hajime Okumura
  • Publication number: 20050077591
    Abstract: A semiconductor device formed on a silicon carbide semiconductor substrate comprises an epitaxial layer formed on a surface sloping (or inclining) by 0 to less than 1 degree from a (000-1) face of the silicon carbide semiconductor substrate, wherein at least one of a P type semiconductor area or an N type semiconductor area is selectively formed in the epitaxial layer by ion implantation, a metal electrode is formed so as to contact a surface layer of the P type semiconductor area or the N type semiconductor area, a rectification function is shown between the metal electrode and the P type semiconductor area or the N type semiconductor area, and the semiconductor device is formed on the silicon carbide semiconductor substrate of a Schottky barrier diode or a PN type diode.
    Type: Application
    Filed: August 30, 2004
    Publication date: April 14, 2005
    Inventors: Kenji Fukuda, Ryouji Kosugi, Shinsuke Harada, Junji Senzaki, Kazutoshi Kojima, Satoshi Kuroda