Abstract: An address match determining device has an address filter memory (22) for storing a matrix or table having a plurality of elements each of which is a 1-bit address match determination data indicating whether or not a corresponding N-bit address code is available, and is distinguished by a pair of a first index composed of the m most significant or high-order m bits of the corresponding address code and a second index composed of the remaining lowest or low-order (N−m) bits of the corresponding address code. A received-address latch (21) extracts the high-order m bits and remaining low-order (N−m) bits from an address code latched thereinto.

Abstract: A test analysis apparatus for OBIC analysis and luminous analysis from a rear surface of a semiconductor wafer. According to the present invention, a semiconductor wafer is mounted on a wafer chuck and a probe card which has metallic needles and which is movable along the X, Y, and Z axes supplies a test pulse signal to respective electrode pads on the front surface of the semiconductor wafer. Then, current generated in the semiconductor wafer is detected at the electrode pads. Optical analysis, such as irradiation with a light beam, detection of reflected light, detection of light generated in the semiconductor wafer and the like, is performed from the rear side of the semiconductor wafer, thereby enabling analysis of a failure or a defect of a defective portion while the semiconductor wafer is in actual operating conditions.