Patents by Inventor Kazutosi Ashikawa

Kazutosi Ashikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5872666
    Abstract: Reproducing apparatus with an A/D (analog-to-digital) converter, which realizes high-accuracy data sampling, high-speed data transfer, low dissipation power and low cost. PR (partial response) processing is performed by receiving encoded signals, delaying the received signals on the basis of a reference clock, and adding the delayed signals and the received signals in analog signal form. The added signals are converted into digital values on the basis of the reference clock by the A/D converter, and Viterbi decoding is performed on the basis of the converted digital values. Owing to the PR processing which is performed at a stage preceding the A/D converter, a frequency band for the A/D conversion can be lowered, and hence, the high-accuracy data sampling is permitted.
    Type: Grant
    Filed: November 17, 1995
    Date of Patent: February 16, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Eisaku Saiki, Kazutosi Ashikawa, Seiichi Mita, Shintaro Suzumura, Shoichi Miyazawa, Tsuguyoshi Hirooka