Patents by Inventor Kazuya Adachi
Kazuya Adachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11973146Abstract: A semiconductor integrated circuit including: a substrate of a first conductivity type; a buried insulating film provided on the substrate; an active layer of the first conductivity type provided on the buried insulating film; a first impurity region of a second conductivity type formed within the active layer; an electric field relaxation layer of the second conductivity type formed within the active layer and surrounding the first impurity region; a second impurity region of the first conductivity type formed within the active layer and surrounding the electric field relaxation layer; and a groove formed surrounding the second impurity region and reaching the buried insulating film.Type: GrantFiled: October 27, 2020Date of Patent: April 30, 2024Assignee: KABUSHIKI KAISHA TOKAI-RIKA-DENKI-SEISAKUSHOInventors: Kengo Shima, Yoshikazu Kataoka, Kazuya Adachi, Yuto Hakamata
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Publication number: 20220302323Abstract: A semiconductor integrated circuit including: a substrate of a first conductivity type; a buried insulating film provided on the substrate; an active layer of the first conductivity type provided on the buried insulating film; a first impurity region of a second conductivity type formed within the active layer; an electric field relaxation layer of the second conductivity type formed within the active layer and surrounding the first impurity region; a second impurity region of the first conductivity type formed within the active layer and surrounding the electric field relaxation layer; and a groove formed surrounding the second impurity region and reaching the buried insulating film.Type: ApplicationFiled: October 27, 2020Publication date: September 22, 2022Inventors: Kengo SHIMA, Yoshikazu KATAOKA, Kazuya ADACHI, Yuto HAKAMATA
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Publication number: 20220278230Abstract: An electrostatic protection element including: a first impurity layer of second conductivity type formed on a semiconductor substrate of first conductivity type; a second impurity layer of the first conductivity type formed within the first impurity layer; a first contact layer of the first conductivity type formed in a region within the first impurity layer other than at the second impurity layer; a second and a third contact layer both of the second conductivity type and formed within the second impurity layer; and multilayer wiring connected through a stack structure to the first, the second, and the third contact layer, wherein the stack structure includes at least a first layer wiring connected to each of the first, the second, and the third contact layer, and a second layer wiring connected to the first layer wiring directly above each of the first, the second, and the third contact layer.Type: ApplicationFiled: February 22, 2022Publication date: September 1, 2022Inventors: Kengo SHIMA, Kazuya ADACHI
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Patent number: 11164846Abstract: A semiconductor device manufacturing method includes: applying solder to an arrangement area of a substrate, the substrate having a connection area to which a wiring member is to be directly connected, the connection area neighboring the arrangement area; arranging a component on the arrangement area via the solder; and soldering the component to the arrangement area by heating the solder while covering the connection area. A soldering support jig includes a columnar covering member having a covering surface at a bottom of the columnar covering member.Type: GrantFiled: December 23, 2019Date of Patent: November 2, 2021Assignee: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro Maruyama, Kenshi Kai, Kazuya Adachi
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Patent number: 11107784Abstract: A semiconductor device includes: a multilayer substrate which includes a circuit board and an insulating plate on which the circuit board is formed; and a contact part having a cylindrical hollow hole therein and an open end bonded to a bonding area on the front surface of the circuit board via bonding material. In the case of this semiconductor device, wettability of a contact area of the contact part with respect to the bonding material is approximately equal to wettability of at least the bonding area of the circuit board with respect to the bonding material. Thus, the rising of the bonding material into the hollow hole of the contact part during heating performed when the contact part is bonded to the circuit board is reduced.Type: GrantFiled: February 25, 2020Date of Patent: August 31, 2021Assignee: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro Maruyama, Masaoki Miyakoshi, Masayuki Soutome, Kazuya Adachi, Takeshi Yokoyama
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Publication number: 20200194392Abstract: A semiconductor device includes: a multilayer substrate which includes a circuit board and an insulating plate on which the circuit board is formed; and a contact part having a cylindrical hollow hole therein and an open end bonded to a bonding area on the front surface of the circuit board via bonding material. In the case of this semiconductor device, wettability of a contact area of the contact part with respect to the bonding material is approximately equal to wettability of at least the bonding area of the circuit board with respect to the bonding material. Thus, the rising of the bonding material into the hollow hole of the contact part during heating performed when the contact part is bonded to the circuit board is reduced.Type: ApplicationFiled: February 25, 2020Publication date: June 18, 2020Applicant: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro MARUYAMA, Masaoki MIYAKOSHI, Masayuki SOUTOME, Kazuya ADACHI, Takeshi YOKOYAMA
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Publication number: 20200135691Abstract: A semiconductor device manufacturing method includes: applying solder to an arrangement area of a substrate, the substrate having a connection area to which a wiring member is to be directly connected, the connection area neighboring the arrangement area; arranging a component on the arrangement area via the solder; and soldering the component to the arrangement area by heating the solder while covering the connection area. A soldering support jig includes a columnar covering member having a covering surface at a bottom of the columnar covering member.Type: ApplicationFiled: December 23, 2019Publication date: April 30, 2020Applicant: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro MARUYAMA, Kenshi KAI, Kazuya ADACHI
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Patent number: 10593662Abstract: A protection device includes a semiconductor substrate including a protection element; an insulating layer covering a surface of the semiconductor substrate; a conductive layer disposed in the insulating layer, and extending in a plane that is parallel with the surface of the semiconductor substrate; a passive element formed with an elongated conductor, curved in a plane that is parallel with the conductive layer, and located over the conductive layer; and an input terminal, an output terminal, and a ground terminal exposed in a surface of the insulating layer. One end of the passive element is electrically connected to the input terminal, the other end of the passive element and a high-potential-side terminal of the protection element are electrically connected to the output terminal, and a low-potential-side terminal of the protection element and the conductive layer are electrically connected to the ground terminal.Type: GrantFiled: March 8, 2018Date of Patent: March 17, 2020Assignee: KABUSHIKI KAISHA TOKAI RIKA DENKI SEISAKUSHOInventors: Narumasa Soejima, Takashi Suzuki, Kengo Shima, Yosuke Kanie, Kazuya Adachi
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Patent number: 10566308Abstract: A semiconductor device manufacturing method includes: applying solder to an arrangement area of a substrate, the substrate having a connection area to which a wiring member is to be directly connected, the connection area neighboring the arrangement area; arranging a component on the arrangement area via the solder; and soldering the component to the arrangement area by heating the solder while covering the connection area. A soldering support jig includes a columnar covering member having a covering surface at a bottom of the columnar covering member.Type: GrantFiled: June 26, 2018Date of Patent: February 18, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro Maruyama, Kenshi Kai, Kazuya Adachi
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Patent number: 10522435Abstract: On a conductive plate of an insulated substrate, one open end of a main body part of a cylindrical contact member is bonded by solder. In a hollow part of a hollow cylinder shaped external electrode terminal, a part of the other open end side of the main body part of the cylindrical contact member is inserted from an open end of the external electrode terminal. The other end of the external electrode terminal is separated into branches by cuts inserted in a through-hole insertion part. A column surface of the outside of the branches of the external electrode terminal has an arc shape. Pressure in a direction from inside the external electrode terminal toward the outside is applied to the branches of the through-hole insertion part by an auxiliary wedge. With such a configuration, assembly defects accompanying connection of the external electrode terminal and other members may be eliminated.Type: GrantFiled: March 1, 2018Date of Patent: December 31, 2019Assignee: FUJI ELECTRIC CO., LTD.Inventor: Kazuya Adachi
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Publication number: 20190057951Abstract: A semiconductor device manufacturing method includes: applying solder to an arrangement area of a substrate, the substrate having a connection area to which a wiring member is to be directly connected, the connection area neighboring the arrangement area; arranging a component on the arrangement area via the solder; and soldering the component to the arrangement area by heating the solder while covering the connection area. A soldering support jig includes a columnar covering member having a covering surface at a bottom of the columnar covering member.Type: ApplicationFiled: June 26, 2018Publication date: February 21, 2019Applicant: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro MARUYAMA, Kenshi KAI, Kazuya ADACHI
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Publication number: 20180261592Abstract: A protection device includes: a semiconductor substrate in which a protection element; an insulating layer covering a surface of the semiconductor substrate; a conductive layer disposed in the insulating layer, and extending in a plane that is parallel with the surface of the semiconductor substrate; a passive element formed with an elongated conductor, curved in a plane that is parallel with the conductive layer, and located over the conductive layer; and an input terminal, an output terminal, and a ground terminal exposed in a surface of the insulating layer. One end of the passive element is electrically connected to the input terminal, the other end of the passive element and a high-potential-side terminal of the protective element are electrically connected to the output terminal, and a low-potential-side terminal of the protective element and the conductive layer are electrically connected to the ground terminal.Type: ApplicationFiled: March 8, 2018Publication date: September 13, 2018Applicant: KABUSHIKI KAISHA TOKAI RIKA DENKI SEISAKUSHOInventors: Narumasa SOEJIMA, Takashi SUZUKI, Kengo SHIMA, Yosuke KANIE, Kazuya ADACHI
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Publication number: 20180190554Abstract: On a conductive plate of an insulated substrate, one open end of a main body part of a cylindrical contact member is bonded by solder. In a hollow part of a hollow cylinder shaped external electrode terminal, a part of the other open end side of the main body part of the cylindrical contact member is inserted from an open end of the external electrode terminal. The other end of the external electrode terminal is separated into branches by cuts inserted in a through-hole insertion part. A column surface of the outside of the branches of the external electrode terminal has an arc shape. Pressure in a direction from inside the external electrode terminal toward the outside is applied to the branches of the through-hole insertion part by an auxiliary wedge. With such a configuration, assembly defects accompanying connection of the external electrode terminal and other members may be eliminated.Type: ApplicationFiled: March 1, 2018Publication date: July 5, 2018Applicant: FUJI ELECTRIC CO., LTD.Inventor: Kazuya ADACHI
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Patent number: 8492751Abstract: Provided is an organic EL device capable of maintaining an excellent luminous efficiency over an extended period of time, particularly in a top emission-type EL device. The organic EL device of the invention includes a substrate and an organic EL element formed on the substrate. The organic EL element is composed of a bottom electrode, an organic EL layer, a top electrode and a protective layer. The protective layer is composed of one or a plurality of inorganic films, and at least one of the one or plurality of inorganic films is an SiON:H film having stretching-mode peak area ratios, as determined by infrared absorption spectroscopy, that include an absorption area ratio of N—H bonds to Si—N bonds in the SiON:H film which is not less than 0.04 but not more than 0.07 and an absorption area ratio of Si—H bonds to Si—N bonds which is not more than 0.15.Type: GrantFiled: April 6, 2009Date of Patent: July 23, 2013Assignee: Sharp Kabushiki KaishaInventor: Kazuya Adachi
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Patent number: 8410691Abstract: An organic EL device includes a substrate; an organic EL element formed on the substrate; and a sealing film formed on the organic EL element that is a CVD-deposited silicon nitride film containing from 0.85 at % to 0.95 at % H. A method of manufacturing the organic EL device includes the steps of: forming an organic EL element on a substrate; and forming a sealing film on the organic EL element in a process including mixing SiH4, NH3, N2, and H2, during which the H2 is introduced at a flow rate set to from 1 volume percent to 5 volume percent of that of the N2, so that a silicon nitride film containing hydrogen atoms or hydrogen molecules is formed.Type: GrantFiled: September 29, 2009Date of Patent: April 2, 2013Assignee: Sharp Kabushiki KaishaInventor: Kazuya Adachi
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Patent number: 8319428Abstract: An object of this invention is to provide a sealing film for an organic EL element having excellent moisture resistance, due to the absence of pinholes. A sealing film of this invention is a sealing film for an organic EL element having a layered structure of at least three layers with a silicon nitride film and a silicon oxynitride film layered in alternation, and is characterized in that odd-numbered layers from the side of the organic EL element are silicon nitride films having a film thickness (T1) of 200 nm or greater, and even-numbered layers from the side of the organic EL element are silicon oxynitride films having a film thickness (T2) of 20 nm or greater and 50 nm or less.Type: GrantFiled: June 29, 2009Date of Patent: November 27, 2012Assignee: Sharp Kabushiki KaishaInventor: Kazuya Adachi
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Publication number: 20120194061Abstract: An organic EL device includes a substrate; an organic EL element formed on the substrate; and a sealing film formed on the organic EL element, wherein the sealing film is a silicon nitride film containing from 0.85 to 0.95 at % H. A method of manufacturing the organic EL device, includes the steps of: forming an organic EL element on a substrate; and forming a sealing film on the organic EL element in a process including mixing SiH4, NH3, N2, and H2, during which the H2 is introduced at a flow rate set to from 1 to 5 volume percent of that of the N2, so that a silicon nitride film containing hydrogen atoms or hydrogen molecules is formed.Type: ApplicationFiled: September 29, 2009Publication date: August 2, 2012Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.Inventor: Kazuya Adachi
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Publication number: 20120104945Abstract: An object of this invention is to provide a sealing film for an organic EL element having excellent moisture resistance, due to the absence of pinholes. A sealing film of this invention is a sealing film for an organic EL element having a layered structure of at least three layers with a silicon nitride film and a silicon oxynitride film layered in alternation, and is characterized in that odd-numbered layers from the side of the organic EL element are silicon nitride films having a film thickness (T1) of 200 nm or greater, and even-numbered layers from the side of the organic EL element are silicon oxynitride films having a film thickness (T2) of 20 nm or greater and 50 nm or less.Type: ApplicationFiled: June 29, 2009Publication date: May 3, 2012Applicant: C/O FUJI ELECTRIC HOLDINGS CO., LTD.Inventor: Kazuya Adachi
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Publication number: 20110186822Abstract: Provided is an organic EL device capable of maintaining an excellent luminous efficiency over an extended period of time, particularly in a top emission-type EL device. The organic EL device of the invention includes a substrate and an organic EL element formed on the substrate. The organic EL element is composed of a bottom electrode, an organic EL layer, a top electrode and a protective layer. The protective layer is composed of one or a plurality of inorganic films, and at least one of the one or plurality of inorganic films is an SiON:H film having stretching-mode peak area ratios, as determined by infrared absorption spectroscopy, that include an absorption area ratio of N—H bonds to Si—N bonds in the SiON:H film which is not less than 0.04 but not more than 0.07 and an absorption area ratio of Si—H bonds to Si—N bonds which is not more than 0.15.Type: ApplicationFiled: April 6, 2009Publication date: August 4, 2011Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.Inventor: Kazuya Adachi
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Patent number: D926966Type: GrantFiled: April 22, 2019Date of Patent: August 3, 2021Assignee: MEDRX CO., LTD.Inventors: Takashi Shigeno, Manabu Ikarashi, Kazuya Adachi, Katsunori Kobayashi, Hidetoshi Hamamoto