Patents by Inventor Kazuya Arai

Kazuya Arai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240344032
    Abstract: An organoid production method includes culturing a human stem cell in a culture medium containing a cyclic peptide having an amino acid sequence set forth in Formula (1) or a pharmaceutically acceptable salt of the cyclic peptide [in Formula (1), X1 to X6 each represent a specific modified amino acid, X7 represents any amino acid residue, R is absent or represents a C-terminal modification group, n is an integer of 0 or 1, PeG is N-(2-phenylethyl)-glycine, and Nal1 is ?-(1-naphthyl)-L-alanine].
    Type: Application
    Filed: March 22, 2024
    Publication date: October 17, 2024
    Applicant: JSR CORPORATION
    Inventors: Kazuya ARAI, Manabu ITOH, Kentaro SHOJI, Natsumi SUGIMOTO, Ryo OKADA
  • Publication number: 20240264200
    Abstract: A contact probe includes: a first plunger including a tip end configured to be contact with one of electrode, and a flange that is continuous to the tip end; and a coil spring configured to be joined to the first plunger. The tip end includes: a tip contact including a tip configured to be contact with the one of the electrode; a columnar first base portion provided to a base end side of the tip contact, and including a lateral side surface extending along a longitudinal axis of the first plunger; and a second base portion provided to an end of the first base portion, the end being on a side opposite to the tip contact, the second base portion including an inclined lateral side inclined in a manner approaching the longitudinal axis of the first plunger, as the inclined lateral side extends toward the flange.
    Type: Application
    Filed: January 29, 2024
    Publication date: August 8, 2024
    Applicant: NHK Spring Co., Ltd.
    Inventors: Kazuya Soma, Hajime Arai
  • Patent number: 12043754
    Abstract: [Problem] Provided is a two-component type curable resin composition that allows a mixture of an A agent and a B agent to have excellent dispersibility and printability, causes no visible-copper phenomenon, and provides an excellent packing form (receivability) for transportation. [Solution] A two-component type curable resin composition according to the present invention is characterized by including: an A agent containing a carboxyl group-containing resin; and a B agent containing a thermosetting ingredient, wherein the A agent has a viscosity value in the range of 50 dPa·s or more and 200 dPa·s or less at 25° C. at 5 rpm, wherein the B agent has a viscosity value in the range of 100 dPa·s or more and 300 dPa·s or less at 25° C.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: July 23, 2024
    Assignee: TAIYO HOLDINGS CO., LTD.
    Inventors: Nobuyuki Yanagida, Kenichi Shirakawa, Kazuya Kitamura, Yasuaki Arai
  • Publication number: 20240011973
    Abstract: A method for producing a two-dimensional small intestinal organoid having a villus structure, the method including a step 1 of culturing a cell derived from a small intestinal epithelium in an extracellular matrix to obtain a three-dimensional small intestinal organoid, a step 2 of dispersing the three-dimensional small intestinal organoid and monolayer culturing on the extracellular matrix to obtain a two-dimensional small intestinal organoid, and a step 3 of further culturing the two-dimensional small intestinal organoid while letting a culture medium of the two-dimensional small intestinal organoid to flow so that the two-dimensional small intestinal organoid forms a villus structure.
    Type: Application
    Filed: December 3, 2021
    Publication date: January 11, 2024
    Applicants: KEIO UNIVERSITY, JSR CORPORATION
    Inventors: Toshiro SATO, Shinya SUGIMOTO, Kazuya ARAI
  • Patent number: 10109571
    Abstract: A wiring substrate includes a laminated sheet including a first conductor pattern, an inorganic dielectric layer, and a second conductor pattern. The first conductor pattern, the inorganic dielectric layer, and the second conductor pattern are laminated in this order. Also, the first conductor pattern is divided into a plurality of regions.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: October 23, 2018
    Assignees: FUJITSU LIMITED, SONY CORPORATION
    Inventors: Kei Fukui, Kazuya Arai, Koji Komemura, Kazuhiko Iijima, Kenichiro Abe, Shinji Rokuhara, Shuichi Oka
  • Publication number: 20170103944
    Abstract: A wiring substrate includes a laminated sheet including a first conductor pattern, an inorganic dielectric layer, and a second conductor pattern. The first conductor pattern, the inorganic dielectric layer, and the second conductor pattern are laminated in this order. Also, the first conductor pattern is divided into a plurality of regions.
    Type: Application
    Filed: September 28, 2016
    Publication date: April 13, 2017
    Applicants: FUJITSU LIMITED, SONY CORPORATION
    Inventors: Kei FUKUI, Kazuya Arai, Koji Komemura, Kazuhiko Iijima, Kenichiro Abe, Shinji Rokuhara, Shuichi Oka
  • Patent number: 9386700
    Abstract: A method of manufacturing a circuit board includes forming a first electrode on a support substrate, covering the support substrate and the first electrode with a first insulating layer, polishing the first insulating layer to expose a first surface of the first electrode, forming a first wiring on the first insulating layer after exposing the first surface of the first electrode, the first wiring being connected to the first electrode, and removing the support substrate to expose a second surface of the first electrode after forming the first wiring.
    Type: Grant
    Filed: January 12, 2015
    Date of Patent: July 5, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Kazuya Arai, Shinpei Ikegami, Hitoshi Suzuki, Kei Fukui
  • Publication number: 20150124423
    Abstract: A method of manufacturing a circuit board includes forming a first electrode on a support substrate, covering the support substrate and the first electrode with a first insulating layer, polishing the first insulating layer to expose a first surface of the first electrode, forming a first wiring on the first insulating layer after exposing the first surface of the first electrode, the first wiring being connected to the first electrode, and removing the support substrate to expose a second surface of the first electrode after forming the first wiring.
    Type: Application
    Filed: January 12, 2015
    Publication date: May 7, 2015
    Inventors: Kazuya ARAI, Shinpei IKEGAMI, Hitoshi SUZUKI, Kei FUKUI
  • Patent number: 8959758
    Abstract: A method of manufacturing a circuit board includes forming a first electrode on a support substrate, covering the support substrate and the first electrode with a first insulating layer, polishing the first insulating layer to expose a first surface of the first electrode, forming a first wiring on the first insulating layer after exposing the first surface of the first electrode, the first wiring being connected to the first electrode, and removing the support substrate to expose a second surface of the first electrode after forming the first wiring.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: February 24, 2015
    Assignee: Fujitsu Limited
    Inventors: Kazuya Arai, Shinpei Ikegami, Hitoshi Suzuki, Kei Fukui
  • Patent number: 8800142
    Abstract: A semiconductor chip mounting layer of a package substrate unit includes an insulation layer, a conductive seed metal layer formed on the top surface of the insulation layer, conductive pads formed on the top surface of the conductive seed metal layer, metal posts formed substantially in the central portion on the top surface of the conductive pads, and a solder resist layer that is formed to surround the conductive pads and the metal posts.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: August 12, 2014
    Assignee: Fujitsu Limited
    Inventors: Hnin Nway San Nang, Kazuya Arai, Kei Fukui, Shinpei Ikegami, Yasuhito Takahashi, Hideaki Yoshimura, Hitoshi Suzuki
  • Publication number: 20140065655
    Abstract: A screening method for a substance acting on a maintenance of the epithelial properties of cells which enables obtainment of highly-reliable data quickly at low costs is provided. The screening method includes (a) a step for culturing cells on a cell culture substrate that can form a spheroid, (b) a step for causing the cells to contact a test substance, and (c) a step for evaluating an effect of the test substance acting on a maintenance of the epithelial properties of the cells with a change in a morphology of the spheroid being as an indicator. In this case, the step (c) can carry out an evaluation through a measurement of the number of spheroids in a predetermined size or a measurement of the hypoxic areas in the spheroid.
    Type: Application
    Filed: September 5, 2012
    Publication date: March 6, 2014
    Applicant: SCIVAX CORPORATION
    Inventors: Manabu Itoh, Kazuya Arai, Hiroshi Kajita, Satoru Tanaka
  • Publication number: 20120241206
    Abstract: A method of manufacturing a circuit board includes forming a first electrode on a support substrate, covering the support substrate and the first electrode with a first insulating layer, polishing the first insulating layer to expose a first surface of the first electrode, forming a first wiring on the first insulating layer after exposing the first surface of the first electrode, the first wiring being connected to the first electrode, and removing the support substrate to expose a second surface of the first electrode after forming the first wiring.
    Type: Application
    Filed: March 22, 2012
    Publication date: September 27, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Kazuya ARAI, Shinpei IKEGAMI, Hitoshi SUZUKI, Kei FUKUI
  • Publication number: 20120067635
    Abstract: A semiconductor chip mounting layer of a package substrate unit includes an insulation layer, a conductive seed metal layer formed on the top surface of the insulation layer, conductive pads formed on the top surface of the conductive seed metal layer, metal posts formed substantially in the central portion on the top surface of the conductive pads, and a solder resist layer that is formed to surround the conductive pads and the metal posts.
    Type: Application
    Filed: February 8, 2011
    Publication date: March 22, 2012
    Applicant: Fujitsu Limited
    Inventors: Hnin Nway San Nang, Kazuya Arai, Kei Fukui, Shinpei Ikegami, Yasuhito Takahashi, Hideaki Yoshimura, Hitoshi Suzuki
  • Patent number: 7441330
    Abstract: A process for producing a circuit board includes the steps of etching the third metal layer of a three-layer metal laminate into a predetermined interconnection pattern by photolithography; forming a laminate on the interconnection pattern by a buildup method, the laminate including interconnection patterns with insulating layers provided therebetween, the interconnection patterns being electrically connected to each other; separating a first metal layer from a supporting substrate to detach the laminate; removing the first metal layer of the three-layer metal laminate by etching using a second metal layer as a barrier layer; and removing the exposed second metal layer by etching.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: October 28, 2008
    Assignee: Fujitsu Limited
    Inventors: Kenji Takano, Munekazu Shibata, Kazuya Arai, Junichi Kanai, Kaoru Sugimoto
  • Publication number: 20070289704
    Abstract: A process for producing a circuit board includes the steps of detachably laminating a metal foil layer on a surface of a supporting substrate; forming a laminate on the metal foil layer by a buildup method, the laminate including interconnection patterns with insulating layers provided therebetween, the interconnection patterns being electrically connected to each other; separating the metal foil layer from the supporting substrate to detach the laminate; and etching the metal foil layer by photolithography so as to form a predetermined interconnection pattern.
    Type: Application
    Filed: October 30, 2006
    Publication date: December 20, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Kenji Takano, Munekazu Shibata, Kazuya Arai, Junichi Kanai, Kaoru Sugimoto
  • Publication number: 20070289128
    Abstract: A process for producing a circuit board includes the steps of etching the third metal layer of a three-layer metal laminate into a predetermined interconnection pattern by photolithography; forming a laminate on the interconnection pattern by a buildup method, the laminate including interconnection patterns with insulating layers provided therebetween, the interconnection patterns being electrically connected to each other; separating a first metal layer from a supporting substrate to detach the laminate; removing the first metal layer of the three-layer metal laminate by etching using a second metal layer as a barrier layer; and removing the exposed second metal layer by etching.
    Type: Application
    Filed: October 17, 2006
    Publication date: December 20, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Kenji Takano, Munekazu Shibata, Kazuya Arai, Junichi Kanai, Kaoru Sugimoto
  • Patent number: 5735480
    Abstract: A relay apparatus for relatively rotating members includes a first member (rotating member) having an internal cylindrical portion, a second member (fixed member) having an external cylindrical portion which surrounds the internal cylindrical portion with a predetermined gap and is relatively rotated with respect to the internal cylindrical portion, a flexible flat cable which is stored along an annular space between the internal cylindrical portion and the external cylindrical portion to be spirally wound and which has an inner peripheral portion held by the internal cylindrical portion and an outer peripheral portion held by the external cylindrical portion, and a C-shaped moving member, movably arranged along the space, for inverting the flexible flat cable 13 in an opening portion 21c. One member of the first member 11 and the second member as rotatably driven and, has a flange formed on the cylindrical portion, and the moving member is arranged on the flange.
    Type: Grant
    Filed: August 7, 1996
    Date of Patent: April 7, 1998
    Assignee: Yazaki Corporation
    Inventors: Kazuya Arai, Masakazu Umemura, Hiroyuki Okamoto, Takeshi Sakakibara, Satoshi Ishikawa, Hiraku Tanaka, Kazuhito Sakai
  • Patent number: 5517204
    Abstract: An antenna having a central axis is supported on a supporting member which in turn is supported on an azimuth gimbal. The antenna and the supporting member are rotatable around an elevation axis perpendicular to the central axis gimbal is supported on a base and is rotatable around an azimuth axis perpendicular to the elevation axis. A first gyro having an input axis parallel to the elevation axis is secured to the supporting member, and a second gyro having an input axis perpendicular to both the central axis and the elevation angle axis is secured to the supporting member. An accelerometer is provided for outputting a signal representative of an inclination angle of the central axis relative to a horizontal plane. An azimuth transmitter is provided for outputting a signal representative of a rotation angle of the azimuth gimbal around the azimuth axis.
    Type: Grant
    Filed: March 5, 1993
    Date of Patent: May 14, 1996
    Assignee: Tokimec Inc.
    Inventors: Takao Murakoshi, Takeshi Hojo, Kanshi Yamamoto, Kazuteru Sato, Koichi Umeno, Yoshinori Kamiya, Kazuya Arai, Mutumi Takahashi, Yasuke Kosai
  • Patent number: 5115108
    Abstract: The two-stage rubber switch comprises a housing; an operating knob; two push bodies slidably supported by the housing; a contact wiring board having four mutually-opposing contact end portions arranged two by two under each push body; a rubber switch member interposed between the housing and the contact wiring board and having four conductive contact pieces arranged so as to be opposed to the four mutually-opposing contact end portions, respectively on the contact wiring board; and two-stage switching members in particular, such as semispherical rubber buckling portions formed together with the rubber switch member or elastically slidable push members. Further, it is preferable to use some semispherical rubber buckling portions of the rubber switch member as click feeling providing members.
    Type: Grant
    Filed: February 13, 1991
    Date of Patent: May 19, 1992
    Assignee: Yazaki Corporation
    Inventors: Kikuo Ogawa, Kazuya Arai
  • Patent number: 4822965
    Abstract: A lid lock mechanism in an automobile switch panel device. The mechanism includes an open-top case, a switch panel accommodated in said case, a lid to cover the open-top case, pivotal shafts provided in the open-top case, and clutch members provided in a pair of holes in the lid. At a predetermined opening angle, the lid is maintained in a locked condition while the lid is easily closed manually with a force stronger than a predetermined level.
    Type: Grant
    Filed: July 20, 1987
    Date of Patent: April 18, 1989
    Assignee: Yazaki Corporation
    Inventors: Yukihiro Hyogo, Kikuo Kimura, Satoshi Iida, Kazuya Arai