Patents by Inventor Kazuya Asano

Kazuya Asano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10188948
    Abstract: To improve the user friendliness of switching a map display between the real world and a virtual world while also improving the entertainment value of the game and avoiding the danger arising from using a smartphone while walking.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: January 29, 2019
    Assignees: EARTHBEAT, INC., DWANGO Co., Ltd.
    Inventors: Shigeo Okajima, Kazuya Asano, Hiroto Tamura
  • Publication number: 20180345146
    Abstract: To improve the user friendliness of switching a map display between the real world and a virtual world while also improving the entertainment value of the game and avoiding the danger arising from using a smartphone while walking.
    Type: Application
    Filed: May 25, 2018
    Publication date: December 6, 2018
    Inventors: Shigeo OKAJIMA, Kazuya ASANO, Hiroto TAMURA
  • Publication number: 20180345145
    Abstract: To improve the user friendliness of switching a map display between the real world and a virtual world while also improving the entertainment value of the game and avoiding the danger arising from using a smartphone while walking.
    Type: Application
    Filed: July 26, 2016
    Publication date: December 6, 2018
    Inventors: Shigeo OKAJIMA, Kazuya ASANO, Hiroto TAMURA
  • Publication number: 20180345147
    Abstract: To improve the user friendliness of switching a map display between the real world and a virtual world while also improving the entertainment value of the game and avoiding the danger arising from using a smartphone while walking.
    Type: Application
    Filed: May 25, 2018
    Publication date: December 6, 2018
    Inventors: Shigeo OKAJIMA, Kazuya ASANO, Hiroto TAMURA
  • Publication number: 20170297072
    Abstract: A material-property-value estimating method of estimating a material-property-value of a target steel-strip product manufactured via at least one of a reheating process, a rolling process, and a cooling process, which are performed while a target material is being conveyed along a conveyance route, the material-property-value estimating method includes an estimating step of estimating a material-property-value of each of meshes dividing the target steel-strip product based on a measured value that has been measured once or more by a measuring device installed on the conveyance route, the measured value including at least a temperature of the target material; and a chemical composition per component of the target steel-strip product.
    Type: Application
    Filed: October 10, 2014
    Publication date: October 19, 2017
    Applicant: JFE STEEL CORPORATION
    Inventors: Shuji Kuyama, Kazuya Asano, Yoshitsugu lijima, Tomoyoshi Ogasahara
  • Publication number: 20170069773
    Abstract: A backsheet for a solar cell module, including a substrate sheet and a cured coating film formed from a coating material that contains a curable functional group-containing fluorinated polymer and an acrylic polymer.
    Type: Application
    Filed: November 21, 2016
    Publication date: March 9, 2017
    Applicant: DAIKIN INDUSTRIES, LTD.
    Inventors: Hideto NAKAGAWA, Kenji GOBOU, Hidenori OZAKI, Kazuya ASANO, Shigehito SAGISAKA
  • Publication number: 20160145369
    Abstract: The present invention aims to provide a composition having excellent hydrophilicity, water permeability, mechanical strength, chemical durability, and low-fouling property, and capable of producing a porous polymer membrane from which a hydrophilic agent is less likely to be eluted. The composition of the present invention includes a vinylidene fluoride resin and a copolymer (A) including a vinyl alcohol unit and a fluoromonomer unit.
    Type: Application
    Filed: June 25, 2014
    Publication date: May 26, 2016
    Applicant: DAIKIN INDUSTRIES, LTD.
    Inventors: Yoshikage OHMUKAI, Kazuya ASANO, Yuko SHIOTANI, Yoshito TANAKA, Manabu FUJISAWA, Kenji ICHIKAWA, Takahiro KITAHARA, Jun MIKI
  • Patent number: 9252295
    Abstract: An object of the present invention is to provide a coating material that can form a coating film that has an excellent adherence for sealants in solar cell modules as well as an excellent resistance to blocking. Further objects are to provide this coating film, a solar cell module backsheet that has this coating film, and a solar cell module that has this coating film. The present invention relates to a coating material that contains a curable functional group-containing fluorinated polymer and a polyisocyanate compound derived from at least one isocyanate selected from the group consisting of xylylene diisocyanate and bis(isocyanatomethyl)cyclohexane.
    Type: Grant
    Filed: November 2, 2012
    Date of Patent: February 2, 2016
    Assignee: DAIKIN INDUSTRIES, LTD.
    Inventors: Hideto Nakagawa, Kenji Gobou, Hidenori Ozaki, Kazuya Asano, Shigehito Sagisaka
  • Publication number: 20150122330
    Abstract: A backsheet for a solar cell module, including a substrate sheet and a cured coating film formed from a coating material that contains a curable functional group-containing fluorinated polymer and an acrylic polymer.
    Type: Application
    Filed: November 26, 2012
    Publication date: May 7, 2015
    Applicant: DAIKIN INDUSTRIES, LTD.
    Inventors: Hideto Nakagawa, Kenji Gobou, Hidenori Ozaki, Kazuya Asano, Shigehito Sagisaka
  • Publication number: 20140318617
    Abstract: An object of the present invention is to provide a backsheet, laminate, and solar cell module that can prevent the infiltration of water through a region of adhesion with the junction box. The present invention is a backsheet for a solar cell module, the backsheet having a water-impermeable sheet and a coating film formed on at least one side of the water-impermeable sheet, wherein the coating film is formed from a coating material containing a curable functional group-containing fluorinated polymer; a first surface treatment layer is formed on the coating film at least on a surface on an opposite side to the water-impermeable sheet; and the wetting index of the first surface treatment layer is at least 40 dyn/cm.
    Type: Application
    Filed: November 2, 2012
    Publication date: October 30, 2014
    Applicant: DAIKIN INDUSTRIES, LTD.
    Inventors: Hideto Nakagawa, Kazuya Asano, Kenji Gobou, Hidenori Ozaki, Shigehito Sagisaka
  • Publication number: 20140290743
    Abstract: An object of the present invention is to provide a coating material that can form a coating film that has an excellent adherence for sealants in solar cell modules as well as an excellent resistance to blocking. Further objects are to provide this coating film, a solar cell module backsheet that has this coating film, and a solar cell module that has this coating film. The present invention relates to a coating material that contains a curable functional group-containing fluorinated polymer and a polyisocyanate compound derived from at least one isocyanate selected from the group consisting of xylylene diisocyanate and bis(isocyanatomethyl)cyclohexane.
    Type: Application
    Filed: November 2, 2012
    Publication date: October 2, 2014
    Applicant: DAIKIN INDUSTRIES, LTD.
    Inventors: Hideto Nakagawa, Kenji Gobou, Hidenori Ozaki, Kazuya Asano, Shigehito Sagisaka
  • Publication number: 20090249059
    Abstract: A packet encryption method for encrypting an IP packet communicated based on an internet protocol is provided. The packet encryption saves fragment information included in an IP header in an area other than the IP header, clears the fragment information included in the IP header, encrypts the IP packet in which the fragment information included in the IP header is cleared, and outputs the encrypted IP packet.
    Type: Application
    Filed: March 30, 2009
    Publication date: October 1, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Kazuya ASANO
  • Patent number: 7471690
    Abstract: There are provided a packet transfer device, a semiconductor device, and a packet transfer system, which can provide a DMZ constructed in a simple configuration. A LAN is connected to a first port. A public server is connected to a second port. A WAN is connected to a third port. A filtering section performs filtering processing according to attributes of each packet inputted via any one of the first to third ports. A routing section carries out routing processing on the packet which was not discarded by the filtering section.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: December 30, 2008
    Assignee: Fujitsu Limited
    Inventors: Kazuya Asano, Teruhiko Nagatomo, Tomokazu Aoki, Junichi Hashida
  • Patent number: 7457292
    Abstract: A packet identification device which is capable of achieving high-speed packet identification while suppressing an increase in circuit size. A lookup table stores a plurality of reference data each divided into unit data associated with respective attributes, in a distributed manner in respective storage areas having addresses defined on an attribute-by-attribute basis, and is operable when a reading address is input, to output a plurality of unit data associated with one of the attributes corresponding to the reading address. An analysis circuit analyzes an attribute of a comparison data item in the input packet. An address control circuit outputs an address corresponding to the attribute of the comparison data item analyzed by the analysis circuit to the lookup table, as the reading address.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: November 25, 2008
    Assignee: Fujitsu Limited
    Inventor: Kazuya Asano
  • Publication number: 20080028210
    Abstract: A packet cipher processor and method for realizing fast packet cipher processing. A packet identification unit analyzes a received target packet to identify an applicable policy to the target packet. Then the packet identification unit creates and gives policy information of the identified policy together with the target packet to a header processing unit. The header processing unit converts the header of the target packet according to the policy information and passes the processing of the target packet to a cipher unit. The cipher unit performs a prescribed cipher process according to the policy on the target packet with the converted header, and outputs the ciphered packet. The packet identification unit, the header processing unit, and the cipher unit operate independently to perform the above processes in a pipeline manner.
    Type: Application
    Filed: July 23, 2007
    Publication date: January 31, 2008
    Applicant: Fujitsu Limited
    Inventor: Kazuya Asano
  • Patent number: 7197035
    Abstract: In a packet transfer apparatus for transferring packets between first and second networks, a translated network address is assigned to a first node in the first network and having a first private network address when the first packet from the first node is transferred to a second node in the second network, and said translated network address is stored in an address management circuit associated with said first and second network addresses. Thereafter, address translation for realizing an NAT function is performed on subsequent packets transferred between the first and second nodes, by a dedicated hardware circuit and reference to the address management circuit, while performing processing for receiving the packets.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: March 27, 2007
    Assignee: Fujitsu Limited
    Inventor: Kazuya Asano
  • Patent number: 7154890
    Abstract: A packet transfer device has a layer 2 switch and performs switching by referring to header information of a 3rd layer and higher layers. Input/output ports receives packets from and transmits packets to other devices connected to the packet transfer device. A header information extracting circuit extracts header information belonging to a 3rd layer (network layer) and higher layers of a network protocol from packets inputted from the respective input/output ports. A table stores header information and control information corresponding to the header information in association with each other. A control information acquiring circuit acquires control information corresponding to the header information extracted by the header information extracting circuit from the table. A processing circuit processes packets based on the control information acquired by the control information acquiring circuit.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: December 26, 2006
    Assignee: Fujitsu Limited
    Inventors: Teruhiko Nagatomo, Kazuya Asano, Junichi Hashida
  • Patent number: 6950877
    Abstract: In a packet transmission system including host apparatuses and a router which transfers a packet from host apparatuses in a first host group to host apparatuses in a second host group, each host apparatus in the first host group inserts in a packet an IP address and a link-layer address of a destination host apparatus in the second host group before transmitting the packet. When the router receives the packet, the router determines an output port connected to at least one host apparatus in the second host group including the destination host apparatus, based on the IP address of the destination host apparatus inserted in the packet, and transmits the received packet from the determined output port.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: September 27, 2005
    Assignee: Fujitsu Limited
    Inventors: Kazuya Asano, Teruhiko Nagatomo
  • Publication number: 20050175231
    Abstract: A decision algorithm of discriminating a defect type and/or a defect level is automatically produced in a short time. The accuracy of defect classification in terms of a defect type or a defect level is improved.
    Type: Application
    Filed: May 16, 2003
    Publication date: August 11, 2005
    Inventors: Takehide Hirata, Kazuya Asano, Yasuo Tomura
  • Publication number: 20050163121
    Abstract: A packet identification device which is capable of achieving high-speed packet identification while suppressing an increase in circuit size. A lookup table stores a plurality of reference data each divided into unit data associated with respective attributes, in a distributed manner in respective storage areas having addresses defined on an attribute-by-attribute basis, and is operable when a reading address is input, to output a plurality of unit data associated with one of the attributes corresponding to the reading address. An analysis circuit analyzes an attribute of a comparison data item in the input packet. An address control circuit outputs an address corresponding to the attribute of the comparison data item analyzed by the analysis circuit to the lookup table, as the reading address.
    Type: Application
    Filed: March 18, 2005
    Publication date: July 28, 2005
    Applicant: FUJITSU LIMITED
    Inventor: Kazuya Asano