Patents by Inventor Kazuya Ishikawa
Kazuya Ishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11911850Abstract: A pillar delivery method is a method for delivering a plurality of pillars onto a substrate, including a glass panel, to manufacture a glass panel unit. The pillar delivery method includes an irradiation step, a holding step, and a mounting step. The irradiation step includes setting, over a holder, a sheet for use to form pillars and irradiating the sheet with a laser beam to punch out the plurality of pillars. The holding step includes having the plurality of pillars, which have been punched out of the sheet, held by the holder. The mounting step includes picking up some or all of the plurality of pillars from the holder and mounting the pillars onto the substrate.Type: GrantFiled: May 16, 2019Date of Patent: February 27, 2024Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Masataka Nonaka, Eiichi Uriu, Takeshi Shimizu, Kazuya Hasegawa, Tasuku Ishibashi, Hiroyuki Abe, Haruhiko Ishikawa
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Patent number: 11912826Abstract: Provided is a fiber-reinforced thermoplastic resin prepreg which exhibits high interfacial adhesion between reinforcement fibers and a matrix resin, while having excellent interlaminar fracture resistance. The fiber-reinforced thermoplastic resin prepreg of the present invention comprises: a matrix resin comprising a polyarylketone resin and a polyetherimide resin; and a carbon fiber, wherein the polyetherimide resin in the matrix resin comprises a polyetherimide resin having a structural unit represented by Formula (1), an amount of the polyetherimide resin in the matrix resin (100% by mass) is 3% by mass to 25% by mass, and an amount of the polyarylketone resin in the matrix resin (100% by mass) is 75% by mass or more.Type: GrantFiled: August 17, 2020Date of Patent: February 27, 2024Assignee: Mitsubishi Chemical CorporationInventors: Takahiro Hayashi, Takeshi Ishikawa, Kouichiro Taniguchi, Kazuya Tanaka, Masayasu Hasuike
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Patent number: 11913277Abstract: A method for manufacturing a glass panel unit includes an assembling step, a bonding step, a gas exhausting step, a sealing step, and an activating step. The bonding step includes melting a peripheral wall in a baking furnace at a first predetermined temperature to hermetically bond a first glass pane and a second glass pane together with the peripheral wall thus melted. The gas exhausting step includes exhausting a gas from an internal space through an exhaust port in the baking furnace to turn the internal space into a vacuum space. The sealing step includes locally heating to a temperature higher than a second predetermined temperature, and thereby melting, either a port sealing material or an exhaust pipe to seal the exhaust port and thereby obtain a work in progress. The activating step includes activating a gas adsorbent after the sealing step to obtain a glass panel unit.Type: GrantFiled: June 19, 2019Date of Patent: February 27, 2024Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Hiroyuki Abe, Eiichi Uriu, Kazuya Hasegawa, Tasuku Ishibashi, Masataka Nonaka, Takeshi Shimizu, Haruhiko Ishikawa
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Publication number: 20180147819Abstract: A glass sheet includes a main surface, a first end surface perpendicular to the main surface, and a chamfered surface provided adjacent to the main surface and between the main surface and the first end surface. In a cross section perpendicular to the main surface and the first end surface, a point at which an imaginary line of the first end surface and an imaginary line of the chamfered surface intersect is a first intersection point, and a point at which a straight line that passes through the first intersection point, is perpendicular to the imaginary line of the first end surface and is extended toward the chamfered surface intersects the chamfered surface is a second intersection point. A line segment connecting the first intersection point and the second intersection point has a length of 10 ?m or less.Type: ApplicationFiled: January 25, 2018Publication date: May 31, 2018Applicant: ASAHI GLASS COMPANY, LIMITEDInventors: Naoaki Miyamoto, Masabumi Ito, Kazuya Ishikawa, Kazuya Takemoto, Naoya Wada
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Publication number: 20180081111Abstract: A glass sheet includes a first surface; a second surface facing the first surface; and at least one first edge surface disposed between the first surface and the second surface. A mean height We of a waviness profile element of the first edge surface and a mean length WSm of the waviness profile element satisfy Formula (1) below. W c ? 1 0.6 ? ? 2 ? ( n g - 1 ) ยท WSm 2 ( 1 ) where ng represents a refractive index of the glass sheet.Type: ApplicationFiled: November 6, 2017Publication date: March 22, 2018Applicant: Asahi Glass Company, LimitedInventors: Naoaki MIYAMOTO, Masabumi ITO, Kazuya ISHIKAWA, Kazuya TAKEMOTO, Shigeki TAKANO
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Publication number: 20170327417Abstract: The present invention relates to a glass member including a glass and a reflection sheet, in which the glass includes: a first surface; a second surface opposite to the first surface; at least one first end surface that is provided between the first surface and the second surface; and at least one second end surface that is provided between the first surface and the second surface and is different from the first end surface, the glass has an effective optical path length of 5 cm to 200 cm, the glass has an average internal transmittance of at least 80% in a visible light region over the effective optical path length, the second end surface has a surface roughness Ra of not higher than 0.8 ?m, and the reflection sheet is disposed on the second end surface, and relates to a glass for use in the glass member.Type: ApplicationFiled: August 1, 2017Publication date: November 16, 2017Applicant: ASAHI GLASS COMPANY, LIMITEDInventors: Naoaki MIYAMOTO, Masabumi ITO, Kazuya ISHIKAWA
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Patent number: 9776251Abstract: A cutting insert is configured to include: a first portion having a rake face, a flank face, a cutting edge, and a face facing an insert attachment portion at an end of a tool main body; and a second portion having a side surface including at least one flat plane that is parallel to a center line of a tool or inclined at a prescribed angle to the center line. The second portion extends continuously to a region surrounded by the face of the first portion. The second portion is fitted into the tool main body to position the cutting insert and to prevent the cutting insert from rotating.Type: GrantFiled: August 6, 2013Date of Patent: October 3, 2017Assignees: Sumitomo Electric Hardmetal Corp., Sumitomo Electric Industries, Ltd., DMG MORI SEIKI CO., LTD.Inventors: Junya Okida, Kazuya Ishikawa, Shigenori Emoto, Daisuke Murakami, Shinya Ikenaga, Kazuo Noguchi, Suehiro Ikeda, Takayuki Hirokawa, Yoshio Ohara, Morihiro Hideta, Yohei Oda
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Publication number: 20170226006Abstract: A glass includes a first surface; a second surface that faces the first surface; at least one first end surface arranged between the first surface and the second surface; and at least one first chamfering surface connecting the first surface or the second surface with the first end surface. A surface roughness Ra of the first chamfering surface is 0.4 ?m or less.Type: ApplicationFiled: April 26, 2017Publication date: August 10, 2017Applicant: Asahi Glass Company, LimitedInventors: Masabumi ITO, Naoaki MIYAMOTO, Kazuya ISHIKAWA
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Patent number: 9686855Abstract: An embodiment of an multilayer ceramic capacitor with interposer includes: an interposer 20 having an insulated substrate 21, two first conductor pads 22, two second conductor pads 23 and two conductor vias 24 connecting the first conductor pads 22 and second conductor pads 23; and a multilayer ceramic capacitor 10 having external electrodes 12 that are each connected to each first conductor pad 22 of the interposer 20 via solder SOL. Each conductor via 24 of the interposer 20 has a through hole 24a inside, and a void GA not filled with the solder SOL is present in each through hole 24a on the second conductor pad 23 side. The multilayer ceramic capacitor with interposer is capable of suppressing noise due to electrostriction.Type: GrantFiled: February 12, 2014Date of Patent: June 20, 2017Assignee: TAIYO YUDEN CO., LTDInventors: Kazuya Ishikawa, Nobuhiro Sasaki, Hideo Ishihara, Katsunosuke Haga
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Patent number: 9640857Abstract: A communication module includes a circuit board having electronic components thereon, an insulative molded member encapsulating the electronic components on the circuit board, and an antenna unit on the molded member. The circuit board is electrically connected to the antenna unit through a post terminal. The antenna unit and the molded member define a cavity therebetween.Type: GrantFiled: November 23, 2015Date of Patent: May 2, 2017Assignee: ALPS ELECTRIC CO., LTD.Inventors: Masashi Nakagawa, Kazuya Ishikawa, Yoshihisa Shibuya
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Publication number: 20160156092Abstract: A communication module includes a circuit board having electronic components thereon, an insulative molded member encapsulating the electronic components on the circuit board, and an antenna unit on the molded member. The circuit board is electrically connected to the antenna unit through a post terminal. The antenna unit and the molded member define a cavity therebetween.Type: ApplicationFiled: November 23, 2015Publication date: June 2, 2016Inventors: Masashi Nakagawa, Kazuya Ishikawa, Yoshihisa Shibuya
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Publication number: 20160007446Abstract: An embodiment of an multilayer ceramic capacitor with interposer includes: an interposer 20 having an insulated substrate 21, two first conductor pads 22, two second conductor pads 23 and two conductor vias 24 connecting the first conductor pads 22 and second conductor pads 23; and a multilayer ceramic capacitor 10 having external electrodes 12 that are each connected to each first conductor pad 22 of the interposer 20 via solder SOL. Each conductor via 24 of the interposer 20 has a through hole 24a inside, and a void GA not filled with the solder SOL is present in each through hole 24a on the second conductor pad 23 side. The multilayer ceramic capacitor with interposer is capable of suppressing noise due to electrostriction.Type: ApplicationFiled: February 12, 2014Publication date: January 7, 2016Inventors: Kazuya ISHIKAWA, Nobuhiro SASAKI, Hideo ISHIHARA, Katsunosuke HAGA
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Publication number: 20150231702Abstract: A cutting insert is configured to include: a first portion having a rake face, a flank face, a cutting edge, and a face facing an insert attachment portion at an end of a tool main body; and a second portion having a side surface including at least one flat plane that is parallel to a center line of a tool or inclined at a prescribed angle to the center line. The second portion extends continuously to a region surrounded by the face of the first portion. The second portion is fitted into the tool main body to position the cutting insert and to prevent the cutting insert from rotating.Type: ApplicationFiled: August 6, 2013Publication date: August 20, 2015Inventors: Junya Okida, Kazuya Ishikawa, Shigenori Emoto, Daisuke Murakami, Shinya Ikenaga, Kazuo Noguchi, Suehiro Ikeda, Takayuki Hirokawa, Yoshio Ohara, Morihiro Hideta, Yohei Oda
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Publication number: 20040232565Abstract: A circuit device includes a substrate, a semiconductor chip mounted on the substrate, and a sealing layer for sealing the semiconductor chip to cover the semiconductor chip. The sealing layer includes a silicone-based material that has a thixotropic index from 2 to 6 and an elastic coefficient of 1 to 50 MPa. A shielding member is attached to the substrate and covers the sealing layer.Type: ApplicationFiled: October 21, 2003Publication date: November 25, 2004Applicant: Alps Electric Co., Ltd.Inventors: Hiroyuki Sakamoto, Kazuya Ishikawa, Seiichi Yokoyama