Patents by Inventor Kazuya Kawamoto

Kazuya Kawamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240144507
    Abstract: An information processing apparatus includes one or more memories storing instructions, and one or more processors executing the instructions to acquire a captured image and a distance image, detect an object from the captured image, acquire first distance information indicating a distance to the detected object, acquire a grounding position of the detected object based on the captured image and acquire second distance information indicating a distance to the detected object based on the first distance information and the acquired grounding position.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 2, 2024
    Inventors: Kazuya Nobayashi, Shin Tanaka, Makoto Oigawa, Shigeo Kodama, Tomoyuki Kawamoto
  • Patent number: 11967294
    Abstract: A common electrode driver includes an inverting amplifier including a first resistor, a second resistor, and an operational amplifier, and a resistance ratio adjustment circuit that adjusts, in accordance with a length of one horizontal scan period, a resistance ratio being a ratio of a resistance value of the second resistor to a resistance value of the first resistor. A feedback voltage is provided to one end of the first resistor. The resistance ratio adjustment circuit sets the resistance ratio when second driving is performed, in which a length of one horizontal scan period is a second time longer than a first time, to be smaller than the resistance ratio when first driving is performed, in which a length of one horizontal scan period is the first time.
    Type: Grant
    Filed: May 1, 2023
    Date of Patent: April 23, 2024
    Assignee: Sharp Display Technology Corporation
    Inventors: Masaki Uehata, Yasuki Mori, Kohji Saitoh, Takayuki Mizunaga, Kazuya Kondoh, Takashi Nojima, Kazuhisa Yoshimoto, Kosuke Kawamoto, Hiroyuki Kito, Kazuki Nakamichi
  • Patent number: 9009387
    Abstract: In a memory system using a storage medium, which is inserted into an electronic apparatus via a connector to add a memory function thereto, the storage medium has a GROUND terminal, a power supply terminal, a control terminal and a data input/output terminal, and the connector has a function of being sequentially connected to each of the terminals. When the storage medium is inserted into the connector, the GROUND terminal and control terminal of the storage medium are connected to corresponding terminals of the connector before the power supply terminal and data input/output terminal of the storage medium are connected to corresponding terminals of the connector. Thus, it is possible to improve the stability when a memory card is inserted into or ejected from the memory system.
    Type: Grant
    Filed: February 8, 2010
    Date of Patent: April 14, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Tanaka, Makoto Yatabe, Takeaki Sato, Kazuya Kawamoto
  • Patent number: 8756401
    Abstract: In a memory system using a storage medium, which is inserted into an electronic apparatus via a connector to add a memory function thereto, the storage medium has a GROUND terminal, a power supply terminal, a control terminal and a data input/output terminal, and the connector has a function of being sequentially connected to each of the terminals. When the storage medium is inserted into the connector, the GROUND terminal and control terminal of the storage medium are connected to corresponding terminals of the connector before the power supply terminal and data input/output terminal of the storage medium are connected to corresponding terminals of the connector. Thus, it is possible to improve the stability when a memory card is inserted into or ejected from the memory system.
    Type: Grant
    Filed: August 6, 2004
    Date of Patent: June 17, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Tanaka, Makoto Yatabe, Takeaki Sato, Kazuya Kawamoto
  • Patent number: 8327067
    Abstract: A nonvolatile memory system comprises a nonvolatile memory having a plurality of data areas; and a memory controller operative to control read and write operations to the nonvolatile memory. The memory controller successively executes read/write operations to plural sectors within a selected data area in the nonvolatile memory in accordance with a command and a sector count and sector address fed from a host device.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: December 4, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuo Kudo, Hiroshi Sukegawa, Kazuya Kawamoto
  • Patent number: 8230156
    Abstract: In a memory system using a storage medium, which is inserted into an electronic apparatus via a connector to add a memory function thereto, the storage medium has a GROUND terminal, a power supply terminal a control terminal and a data input/output terminal, and the connector has a function of being sequentially connected to each of the terminals. When the storage medium is inserted into the connector, the GROUND terminal and control terminal of the storage medium are connected to corresponding terminals of the connector before the power supply terminal and data input/output terminal of the storage medium are connected to corresponding terminals of the connector. Thus, it is possible to improve the stability when a memory card is inserted into or ejected from the memory system.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: July 24, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Tanaka, Makoto Yatabe, Takeaki Sato, Kazuya Kawamoto
  • Publication number: 20120179865
    Abstract: A nonvolatile memory system comprises a nonvolatile memory having a plurality of data areas; and a memory controller operative to control read and write operations to the nonvolatile memory. The memory controller successively executes read/write operations to plural sectors within a selected data area in the nonvolatile memory in accordance with a command and a sector count and sector address fed from a host device.
    Type: Application
    Filed: March 22, 2012
    Publication date: July 12, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yasuo KUDO, Hiroshi Sukegawa, Kazuya Kawamoto
  • Patent number: 8161230
    Abstract: A nonvolatile memory system comprises a nonvolatile memory having a plurality of data areas; and a memory controller operative to control read and write operations to the nonvolatile memory. The memory controller successively executes read/write operations to plural sectors within a selected data area in the nonvolatile memory in accordance with a command and a sector count and sector address fed from a host device.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: April 17, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuo Kudo, Hiroshi Sukegawa, Kazuya Kawamoto
  • Publication number: 20120072649
    Abstract: A nonvolatile memory system comprises a nonvolatile memory having a plurality of data areas; and a memory controller operative to control read and write operations to the nonvolatile memory. The memory controller successively executes read/write operations to plural sectors within a selected data area in the nonvolatile memory in accordance with a command and a sector count and sector address fed from a host device.
    Type: Application
    Filed: September 19, 2011
    Publication date: March 22, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuo KUDO, Hiroshi Sukegawa, Kazuya Kawamoto
  • Publication number: 20110082968
    Abstract: A nonvolatile memory system comprises a nonvolatile memory having a plurality of data areas; and a memory controller operative to control read and write operations to the nonvolatile memory. The memory controller successively executes read/write operations to plural sectors within a selected data area in the nonvolatile memory in accordance with a command and a sector count and sector address fed from a host device.
    Type: Application
    Filed: October 8, 2010
    Publication date: April 7, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuo KUDO, Hiroshi Sukegawa, Kazuya Kawamoto
  • Publication number: 20110055466
    Abstract: A nonvolatile memory system comprises a nonvolatile memory having a plurality of data areas; and a memory controller operative to control read and write operations to the nonvolatile memory. The memory controller successively executes read/write operations to plural sectors within a selected data area in the nonvolatile memory in accordance with a command and a sector count and sector address fed from a host device.
    Type: Application
    Filed: November 8, 2010
    Publication date: March 3, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuo KUDO, Hiroshi Sukegawa, Kazuya Kawamoto
  • Patent number: 7840747
    Abstract: A nonvolatile memory system comprises a nonvolatile memory having a plurality of data areas; and a memory controller operative to control read and write operations to the nonvolatile memory. The memory controller successively executes read/write operations to plural sectors within a selected data area in the nonvolatile memory in accordance with a command and a sector count and sector address fed from a host device.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: November 23, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuo Kudo, Hiroshi Sukegawa, Kazuya Kawamoto
  • Patent number: 7836245
    Abstract: A nonvolatile memory system comprises a nonvolatile memory having a plurality of data areas; and a memory controller operative to control read and write operations to the nonvolatile memory. The memory controller successively executes read/write operations to plural sectors within a selected data area in the nonvolatile memory in accordance with a command and a sector count and sector address fed from a host device.
    Type: Grant
    Filed: July 31, 2007
    Date of Patent: November 16, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuo Kudo, Hiroshi Sukegawa, Kazuya Kawamoto
  • Patent number: 7830711
    Abstract: A data writing method is disclosed. In a memory system comprising a NAND flash memory and a controller which controls the memory, the memory system storing data provided from a host to the NAND flash memory, the data writing method comprises a steps of specifying a column address in which a column failure which has occurred in the NAND flash memory by the controller, and a step of, during writing into the NAND flash memory, writing data of a first logic level into a memory cell which corresponds to the specified column address regardless of write data provided from the controller.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: November 9, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuya Kawamoto, Yoshiyuki Tanaka, Hiroshi Sukegawa
  • Publication number: 20100241795
    Abstract: A nonvolatile memory system comprises a nonvolatile memory having a plurality of data areas; and a memory controller operative to control read and write operations to the nonvolatile memory. The memory controller successively executes read/write operations to plural sectors within a selected data area in the nonvolatile memory in accordance with a command and a sector count and sector address fed from a host device.
    Type: Application
    Filed: March 22, 2010
    Publication date: September 23, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuo KUDO, Hiroshi Sukegawa, Kazuya Kawamoto
  • Publication number: 20100138606
    Abstract: In a memory system using a storage medium, which is inserted into an electronic apparatus via a connector to add a memory function thereto, the storage medium has a GROUND terminal, a power supply terminal, a control terminal and a data input/output terminal, and the connector has a function of being sequentially connected to each of the terminals. When the storage medium is inserted into the connector, the GROUND terminal and control terminal of the storage medium are connected to corresponding terminals of the connector before the power supply terminal and data input/output terminal of the storage medium are connected to corresponding terminals of the connector. Thus, it is possible to improve the stability when a memory card is inserted into or ejected from the memory system.
    Type: Application
    Filed: February 8, 2010
    Publication date: June 3, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiyuki TANAKA, Makoto YATABE, Takeaki SATO, Kazuya KAWAMOTO
  • Patent number: 7711889
    Abstract: A nonvolatile memory system comprises a nonvolatile memory having a plurality of data areas; and a memory controller operative to control read and write operations to the nonvolatile memory. The memory controller successively executes read/write operations to plural sectors within a selected data area in the nonvolatile memory in accordance with a command and a sector count and sector address fed from a host device.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: May 4, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuo Kudo, Hiroshi Sukegawa, Kazuya Kawamoto
  • Publication number: 20100023680
    Abstract: In a memory system using a storage medium, which is inserted into an electronic apparatus via a connector to add a memory function thereto, the storage medium has a GROUND terminal, a power supply terminal, a control terminal and a data input/output terminal, and the connector has a function of being sequentially connected to each of the terminals. When the storage medium is inserted into the connector, the GROUND terminal and control terminal of the storage medium are connected to corresponding terminals of the connector before the power supply terminal and data input/output terminal of the storage medium are connected to corresponding terminals of the connector. Thus, it is possible to improve the stability when a memory card is inserted into or ejected from the memory system.
    Type: Application
    Filed: September 22, 2009
    Publication date: January 28, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiyuki TANAKA, Makoto YATABE, Takeaki SATO, Kazuya KAWAMOTO
  • Patent number: RE42398
    Abstract: In a memory system using a removable recording medium and data stored in the recording medium, identifying information for identifying each recording medium from others is held in the recording medium, and when data stored in the recording medium is used, the identifying information of the recording medium is required. As a result, when a flash memory card, etc. is used, a copyright is reliably protected.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: May 24, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Tanaka, Hiroshi Nakamura, Hiroshi Sukegawa, Mikito Nakabayashi, Kazuya Kawamoto
  • Patent number: RE44503
    Abstract: In a memory system using a removable recording medium and data stored in the recording medium, identifying information for identifying each recording medium from others is held in the recording medium, and when data stored in the recording medium is used, the identifying information of the recording medium is required. As a result, when a flash memory card, etc. is used, a copyright is reliably protected.
    Type: Grant
    Filed: May 4, 2011
    Date of Patent: September 17, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Tanaka, Hiroshi Nakamura, Hiroshi Sukegawa, Mikito Nakabayashi, Kazuya Kawamoto