Patents by Inventor Kazuya Maekawa

Kazuya Maekawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10984956
    Abstract: A ceramic electronic device includes: a multilayer chip having a first and a second internal electrode layers; a first and a second external electrodes covering a first a second regions of a surface of the multilayer chip, wherein: a mark is shifted on a side of one of two end faces on an upper face; the first internal electrode layer is exposed to the first region and connected to the first external electrode; the second internal electrode layer is exposed to the second region and connected to the second external electrode; the second internal electrode is shifted further on a side of the lower face than on a side of the upper face; the second internal electrode layer is shifted further on a side of the lower face than the upper face; the second region is a region of a half of the surface on the lower face side.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: April 20, 2021
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Norihiro Arai, Takeshi Nosaki, Jyouji Ariga, Kazuya Maekawa, Manabu Ozawa, Hiroyuki Moteki
  • Patent number: 10941044
    Abstract: Provided is a method of producing a zeolite film continuously and efficiently. The method of forming zeolite on a surface of a support is characterized in that the method includes: a first step of attaching zeolite fine crystals to a surface of a support; a second step of preparing synthetic gel for growing the fine crystals; a third step of putting the support and the synthetic gel into a continuous reactor and performing hydrothermal synthesis; and a fourth step of cleaning the support on which zeolite has been hydrothermally synthesized, and in the third step, the temperature, pressure, and flow of the synthetic gel in the continuous reactor is adjusted, the support is moved being immersed in the synthetic gel, the reaction time of the hydrothermal synthesis is adjusted by adjusting the time from when the support enters the continuous reactor to when the support exits the continuous reactor.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: March 9, 2021
    Assignee: MITSUI E&S MACHINERY CO., LTD.
    Inventor: Kazuya Maekawa
  • Patent number: 10886069
    Abstract: A multilayer ceramic electronic device includes a pair of external electrodes respectively covering end surfaces of a main body, wherein a height of the multilayer ceramic electronic device that includes the pair of eternal electrodes is greater than 0.80 times and less than 1.25 times as much as the lessor of a width dimension of the electronic device and a length dimension of the electronic device, and wherein each of the pair of external electrodes includes a tin plating film as an outermost layer, and a thickness of the tin plating film on the end surface of the main body is smaller than a thickness of the tin plating film on side surfaces of the main body.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: January 5, 2021
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Kazuya Maekawa, Koji Kawase, Takahiro Ishii
  • Publication number: 20200392007
    Abstract: Provided is a method of producing a zeolite film continuously and efficiently. Zeolite is formed on a surface of a support using a method including: a first step of attaching zeolite fine crystals to a surface of a support; a second step of preparing synthetic gel for growing the fine crystals; a third step of putting the support and the synthetic gel into a reactor and performing hydrothermal synthesis; and a fourth step of cleaning the support subjected to the hydrothermal synthesis, in which in the third step, multiple containers arranged to be movable in a constant-temperature apparatus are each used as the reactor, the temperature and pressure for the hydrothermal synthesis is adjusted by the temperature and pressure in the constant-temperature apparatus, and the reaction time of the hydrothermal synthesis is adjusted by setting the time from when the reactor enters the constant-temperature apparatus to when the reactor exits the constant-temperature apparatus.
    Type: Application
    Filed: July 29, 2019
    Publication date: December 17, 2020
    Applicant: MITSUI E&S MACHINERY CO., LTD.
    Inventor: Kazuya MAEKAWA
  • Publication number: 20200392006
    Abstract: Provided is a method of producing a zeolite film continuously and efficiently. The method of forming zeolite on a surface of a support is characterized in that the method includes: a first step of attaching zeolite fine crystals to a surface of a support; a second step of preparing synthetic gel for growing the fine crystals; a third step of putting the support and the synthetic gel into a continuous reactor and performing hydrothermal synthesis; and a fourth step of cleaning the support on which zeolite has been hydrothermally synthesized, and in the third step, the temperature, pressure, and flow of the synthetic gel in the continuous reactor is adjusted, the support is moved being immersed in the synthetic gel, the reaction time of the hydrothermal synthesis is adjusted by adjusting the time from when the support enters the continuous reactor to when the support exits the continuous reactor.
    Type: Application
    Filed: July 29, 2019
    Publication date: December 17, 2020
    Applicant: MITSUI E&S MACHINERY CO., LTD.
    Inventor: Kazuya MAEKAWA
  • Publication number: 20200328028
    Abstract: A multilayer ceramic electronic device includes a pair of external electrodes respectively covering end surfaces of a main body, wherein a height of the multilayer ceramic electronic device that includes the pair of eternal electrodes is greater than 0.80 times and less than 1.25 times as much as the lessor of a width dimension of the electronic device and a length dimension of the electronic device, and wherein each of the pair of external electrodes includes a tin plating film as an outermost layer, and a thickness of the tin plating film on the end surface of the main body is smaller than a thickness of the tin plating film on side surfaces of the main body.
    Type: Application
    Filed: March 30, 2020
    Publication date: October 15, 2020
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Kazuya MAEKAWA, Koji KAWASE, Takahiro ISHII
  • Patent number: 10629796
    Abstract: A laminate includes, on a substrate, a first buffer layer substantially made of zirconium oxide or stabilized zirconia, a second buffer layer substantially made of yttrium oxide, a metal layer substantially made of at least one among platinum, iridium, palladium, rhodium, vanadium, chromium, iron, molybdenum, tungsten, aluminum, silver, gold, copper, and nickel, and a magnesium oxide layer substantially made of magnesium oxide, in this order.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: April 21, 2020
    Assignee: TDK CORPORATION
    Inventors: Kazuya Maekawa, Makoto Shibata, Katsuyuki Nakada, Yohei Shiokawa, Kazuumi Inubushi
  • Publication number: 20200082988
    Abstract: A ceramic electronic device includes: a multilayer chip having a first and a second internal electrode layers; a first and a second external electrodes covering a first a second regions of a surface of the multilayer chip, wherein: a mark is shifted on a side of one of two end faces on an upper face; the first internal electrode layer is exposed to the first region and connected to the first external electrode; the second internal electrode layer is exposed to the second region and connected to the second external electrode; the second internal electrode is shifted further on a side of the lower face than on a side of the upper face; the second internal electrode layer is shifted further on a side of the lower face than the upper face; the second region is a region of a half of the surface on the lower face side.
    Type: Application
    Filed: September 4, 2019
    Publication date: March 12, 2020
    Inventors: Norihiro ARAI, Takeshi NOSAKI, Jyouji ARIGA, Kazuya MAEKAWA, Manabu OZAWA, Hiroyuki MOTEKI
  • Publication number: 20200052178
    Abstract: The device includes heat transfer portions, each of which is configured to thermally connect: one electrode provided on one side of a hot junction side and a cold junction side of each thermoelectric conversion element; and a heat transfer member. A base material has recesses on a second surface side, the recesses being provided so as to be recessed in a range of a region which overlaps with interspaces between other electrodes provided on other side of the hot junction side and the cold junction side of the each thermoelectric conversion element in a plan view. A low thermal expansion layer is provided on a surface side of each of the thermoelectric conversion element facing the heat transfer member or a high thermal expansion layer is provided on a surface side of each of the thermoelectric conversion elements facing the recess.
    Type: Application
    Filed: July 12, 2019
    Publication date: February 13, 2020
    Applicant: TDK CORPORATION
    Inventors: Makoto SHIBATA, Kazuya MAEKAWA
  • Publication number: 20200028058
    Abstract: A thermoelectric conversion device includes, thermoelectric conversion element arrays each having thermoelectric conversion elements lined up in a first direction intersecting a second direction, a first electrode provided at one end side of thermoelectric conversion element in the second direction, a second electrode provided at other end side of thermoelectric conversion element in the second direction, a first wiring disposed between one thermoelectric conversion element and other thermoelectric conversion element adjacent in the first direction and electrically connected between the first electrodes or the second electrodes of the one thermoelectric conversion element and the other thermoelectric conversion element, and a second wiring electrically connected between the first electrodes or the second electrodes of the thermoelectric conversion elements located at one-end-most sides or other-end-most sides of one thermoelectric conversion element array and other thermoelectric conversion element array in t
    Type: Application
    Filed: July 16, 2019
    Publication date: January 23, 2020
    Applicant: TDK CORPORATION
    Inventors: Makoto SHIBATA, Kazuya MAEKAWA
  • Publication number: 20200028055
    Abstract: A thermoelectric conversion device includes: thermoelectric conversion elements that are disposed on a virtual plane; a plurality of first heat transfer members that are disposed on one side with respect to the thermoelectric conversion elements in a vertical direction perpendicular to the virtual plane and that are configured to transfer heat to/from the thermoelectric conversion elements; and a plurality of heat transfer parts that are disposed on another side with respect to the thermoelectric conversion elements in the vertical direction perpendicular to the virtual plane with a space interposed therebetween in a first direction along an in-plane direction of the virtual plane, and that are configured to transfer heat to/from the thermoelectric conversion elements.
    Type: Application
    Filed: July 31, 2017
    Publication date: January 23, 2020
    Applicant: TDK CORPORATION
    Inventors: Makoto SHIBATA, Kazuya MAEKAWA
  • Publication number: 20200006614
    Abstract: A thermoelectric conversion device includes: a substrate that includes a first surface and a second surface facing each other in a thickness direction; thermoelectric conversion elements that are disposed on a side of the first surface of the substrate; and a plurality of heat transfer parts that are formed with spaces interposed therebetween in a first direction along an in-plane direction of the substrate, and that are configured to transfer heat from/to the thermoelectric conversion elements, wherein a low heat conduction part having a lower thermal conductivity than a thermal conductivity of the heat transfer parts is disposed between the heat transfer parts adjacent to each other in the first direction.
    Type: Application
    Filed: July 31, 2017
    Publication date: January 2, 2020
    Applicant: TDK CORPORATION
    Inventors: Makoto SHIBATA, Kazuya MAEKAWA, Takashi ASATANI
  • Publication number: 20190267531
    Abstract: There is provided a thermoelectric conversion device comprising a substrate including a first surface and a second surface which are opposite to each other in a thickness direction, at least one thermoelectric conversion film disposed on the first surface, and a first heat transfer part disposed on a second surface side. The substrate is joined to the first heat transfer part in a movable state with respect to the first heat transfer part.
    Type: Application
    Filed: July 31, 2017
    Publication date: August 29, 2019
    Applicant: TDK CORPORATION
    Inventors: Makoto SHIBATA, Kazuya MAEKAWA, Takashi ASATANI
  • Publication number: 20180287037
    Abstract: A laminate includes, on a substrate, a first buffer layer substantially made of zirconium oxide or stabilized zirconia, a second buffer layer substantially made of yttrium oxide, a metal layer substantially made of at least one among platinum, iridium, palladium, rhodium, vanadium, chromium, iron, molybdenum, tungsten, aluminum, silver, gold, copper, and nickel, and a magnesium oxide layer substantially made of magnesium oxide, in this order.
    Type: Application
    Filed: March 19, 2018
    Publication date: October 4, 2018
    Applicant: TDK CORPORATION
    Inventors: Kazuya MAEKAWA, Makoto SHIBATA, Katsuyuki NAKADA, Yohei SHIOKAWA, Kazuumi INUBUSHI
  • Publication number: 20180287038
    Abstract: A thermoelectric conversion device includes: a base material; a thermoelectric conversion element in which an N-type semiconductor layer and a P-type semiconductor layer are stacked on a first surface side of the base material with insulating layers therebetween; and a heat transfer part thermally joined to the base material and passing through the thermoelectric conversion element in a thickness direction of the thermoelectric conversion element, wherein first end sides of the N-type semiconductor layers and the P-type semiconductor layers are thermally joined to the heat transfer part on a side of the thermoelectric conversion element facing the heat transfer part in a state where the N-type semiconductor layer and the P-type semiconductor layer are electrically insulated from the heat transfer part.
    Type: Application
    Filed: March 19, 2018
    Publication date: October 4, 2018
    Applicant: TDK CORPORATION
    Inventors: Kazuya MAEKAWA, Makoto SHIBATA
  • Publication number: 20180226559
    Abstract: A thermoelectric conversion device includes a first wiring and a second wiring that are arranged between one thermoelectric conversion element array and the other thermoelectric conversion element array adjacent to each other in a second direction, and electrically connect any two of first electrodes and second electrodes of each thermoelectric conversion element so that the thermoelectric conversion elements constituting one thermoelectric conversion element array and the thermoelectric conversion elements constituting the other thermoelectric conversion element array are alternately connected in series, and the first wiring and the second wiring are arranged so that the wirings at least partially intersect each other via an insulating layer as viewed in the thickness direction of the substrate.
    Type: Application
    Filed: January 29, 2018
    Publication date: August 9, 2018
    Applicant: TDK CORPORATION
    Inventors: Makoto SHIBATA, Kazuya MAEKAWA
  • Patent number: 9780277
    Abstract: A thermoelectric device includes a semiconductor stacked thermoelectric thin film including a first high-purity layer composed of SiGe as a main material and a composite carrier supply layer formed on the first high-purity layer. The composite carrier supply layer includes a second high-purity layer and third high-purity layer composed of Si as a main material, and a carrier supply layer held between the second and third high-purity layers and composed of SiGe as a main material. The carrier supply layer is a P-type carrier supply layer to which an additive of a group XIII element is added or a N-type carrier supply layer to which an additive of a group XV element is added.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: October 3, 2017
    Assignee: TDK CORPORATION
    Inventors: Kazuya Maekawa, Takashi Asatani
  • Publication number: 20160240761
    Abstract: A thermoelectric device includes a semiconductor stacked thin film including a SiGe layer and a Si layer in contact with the SiGe layer. The SiGe has a Si:Ge composition ratio by atomic number ratio within a range of 85:15 to 63:37. The stacked thin film has a plurality of stacked structures each having the SiGe layer and the Si layer.
    Type: Application
    Filed: February 8, 2016
    Publication date: August 18, 2016
    Applicant: TDK CORPORATION
    Inventors: Kazuya MAEKAWA, Takashi ASATANI
  • Patent number: 9257524
    Abstract: Semiconductors of different types are formed by a crystal growth technique and joined at the interface at which rapid atomic-layer-level compositional changes occur while maintaining high crystallinity of the semiconductor layers so as to form a heterogeneous PN junction. A layered film that includes a PN junction oxide thin film is formed on a single crystal substrate. The PN junction oxide thin film is constituted by an N-type semiconductor oxide thin film and a P-type semiconductor oxide thin film that are epitaxially grown to have c-axis orientation represented by (00k).
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: February 9, 2016
    Assignee: TDK CORPORATION
    Inventors: Kazuya Maekawa, Kunihiro Ueda
  • Publication number: 20150255698
    Abstract: A thermoelectric device includes a semiconductor stacked thermoelectric thin film including a first high-purity layer composed of SiGe as a main material and a composite carrier supply layer formed on the first high-purity layer. The composite carrier supply layer includes a second high-purity layer and third high-purity layer composed of Si as a main material, and a carrier supply layer held between the second and third high-purity layers and composed of SiGe as a main material. The carrier supply layer is a P-type carrier supply layer to which an additive of a group XIII element is added or a N-type carrier supply layer to which an additive of a group XV element is added.
    Type: Application
    Filed: March 4, 2015
    Publication date: September 10, 2015
    Inventors: Kazuya MAEKAWA, Takashi ASATANI