Abstract: A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.

Abstract: A motor drive control device controls driving of a motor by performing PWM control of turning on-off of an arm switching element of a PWM inverter outputting a three-phase AC voltage to the motor, and detects current values of respective phases of the three-phase AC voltage. The motor drive control device turns off a lower arm switching element for a largest phase by causing a first PWM pulse based on a largest phase voltage command and a carrier signal throughout an entire first period during which the carrier signal rises or falls to be at a low level. The motor drive control device turns on a lower arm switching element for a smallest phase by causing a second PWM pulse based on a smallest phase voltage command and the carrier signal throughout an entire second period during which the carrier signal rises or falls to be at a high level.

Abstract: A motor drive control device controls driving of a motor by performing PWM control of turning on-off of an arm switching element of a PWM inverter outputting a three-phase AC voltage to the motor, and detects current values of respective phases of the three-phase AC voltage. The motor drive control device turns off a lower arm switching element for a largest phase by causing a first PWM pulse based on a largest phase voltage command and a carrier signal throughout an entire first period during which the carrier signal rises or falls to be at a low level. The motor drive control device turns on a lower arm switching element for a smallest phase by causing a second PWM pulse based on a smallest phase voltage command and the carrier signal throughout an entire second period during which the carrier signal rises or falls to be at a high level.

Abstract: A driving circuit that drives a Hall element for use in a brushless DC motor includes a reference-voltage generator that generates a reference voltage, an operational amplifier to which the reference voltage is input, and a resistance. One of input terminals and GND terminals of all of one or more Hall elements included in the driving circuit are connected to an output end of the operational amplifier. Predetermined potential is applied to the other of the input terminals and the GND terminals of all of the one or more Hall elements. The one or more Hall elements and the resistance are connected in series between a first power supply voltage and ground potential.

Abstract: A motor drive control device that drives and controls a motor by using a PWM inverter includes a dead time compensation portion that obtains a compensation amount to compensate for an error of an output voltage of the PWM inverter generated when a dead time to avoid simultaneous turning-on of respective switching elements mutually connected in series in the PWM inverter is prepared and outputs a voltage command obtained by taking the compensation amount into account to the PWM inverter. The dead time compensation portion obtains the compensation amount based on a magnitude of a current command vector indicating a vector of a current to be followed by a current flowing through the motor. The current command vector is a vector defined by a coordinate system in synchronism with a rotor of the motor or its equivalent coordinate system.

Abstract: A driving circuit that drives a Hall element for use in a brushless DC motor includes a reference-voltage generator that generates a reference voltage, an operational amplifier to which the reference voltage is input, and a resistance. One of input terminals and GND terminals of all of one or more Hall elements included in the driving circuit are connected to an output end of the operational amplifier. Predetermined potential is applied to the other of the input terminals and the GND terminals of all of the one or more Hall elements. The one or more Hall elements and the resistance are connected in series between a first power supply voltage and ground potential.

Abstract: A motor drive control device that drives and controls a motor by using a PWM inverter includes a dead time compensation portion that obtains a compensation amount to compensate for an error of an output voltage of the PWM inverter generated when a dead time to avoid simultaneous turning-on of respective switching elements mutually connected in series in the PWM inverter is prepared and outputs a voltage command obtained by taking the compensation amount into account to the PWM inverter. The dead time compensation portion obtains the compensation amount based on a magnitude of a current command vector indicating a vector of a current to be followed by a current flowing through the motor. The current command vector is a vector defined by a coordinate system in synchronism with a rotor of the motor or its equivalent coordinate system.

Abstract: A system in package usable by being connected to an inverter output circuit includes an analog circuit chip including gate driver circuits that output signals for controlling switching of the inverter output circuit to a terminal electrode and a computer chip including a memory storing a motor control program. It is possible to switch between a first mode in which a potential range of the signal for controlling switching of a high-side transistor is set to be identical to that of the signal for controlling switching of a low-side transistor irrespective of a potential of a connection node and a second mode in which the potential range of the signal for controlling the switching of the high-side transistor is changed based on a potential of a connection node of the inverter output circuit.