Patents by Inventor Kazuya Okada

Kazuya Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12125758
    Abstract: A power semiconductor device in which the size of an insulating substrate is reduced and connection failure can be suppressed includes an insulating substrate, a semiconductor element, and a printed circuit board. The semiconductor element is bonded to one main surface of the insulating substrate. The printed circuit board is bonded to face the semiconductor element. The semiconductor element has a main electrode and a signal electrode. The printed circuit board includes a core member, a first conductor layer, and a second conductor layer. The second conductor layer has a bonding pad. The printed circuit board has a missing portion. A metal column portion is arranged to pass through the inside of the missing portion and reach the insulating substrate. The signal electrode and the bonding pad are connected by a metal wire. The metal column portion and the insulating substrate are bonded.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: October 22, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Nobuhiro Asaji, Kazuya Okada, Hidetoshi Ishibashi
  • Publication number: 20240344032
    Abstract: An organoid production method includes culturing a human stem cell in a culture medium containing a cyclic peptide having an amino acid sequence set forth in Formula (1) or a pharmaceutically acceptable salt of the cyclic peptide [in Formula (1), X1 to X6 each represent a specific modified amino acid, X7 represents any amino acid residue, R is absent or represents a C-terminal modification group, n is an integer of 0 or 1, PeG is N-(2-phenylethyl)-glycine, and Nal1 is ?-(1-naphthyl)-L-alanine].
    Type: Application
    Filed: March 22, 2024
    Publication date: October 17, 2024
    Applicant: JSR CORPORATION
    Inventors: Kazuya ARAI, Manabu ITOH, Kentaro SHOJI, Natsumi SUGIMOTO, Ryo OKADA
  • Publication number: 20240274498
    Abstract: A semiconductor module includes a semiconductor chip, an insulating substrate, a relay board, and a heat-dissipating component. The insulating substrate includes a main circuit pattern and an insulating layer. The main circuit pattern is electrically connected to the semiconductor chip. The relay board sandwiches the semiconductor chip together with the main circuit pattern in a direction in which the insulating layer and the semiconductor chip sandwich the main circuit pattern. The relay board is electrically connected to the main circuit pattern through the semiconductor chip. The heat-dissipating component is sandwiched between the insulating substrate and the relay board in the sandwiching direction. The main circuit pattern at least partially surrounds the heat-dissipating component on the insulating layer.
    Type: Application
    Filed: June 9, 2021
    Publication date: August 15, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shotaro YAMAMOTO, Yoshiko TAMADA, Kazuya OKADA, Seiji OKA
  • Publication number: 20240266315
    Abstract: An object is to provide a technique capable of reducing variations in gate-source voltage among a plurality of semiconductor elements. The semiconductor device includes the plurality of semiconductor elements, a metal electrode, and a control wire. Each of the plurality of semiconductor elements has a control electrode configured to control a main current. The main current of the plurality of semiconductor element flows through the metal electrode. The control wire connects each of the control electrodes of the plurality of semiconductor elements in series, and interlinks with a magnetic field generated when the main current flows through the metal electrode.
    Type: Application
    Filed: November 2, 2023
    Publication date: August 8, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kazuya OKADA
  • Publication number: 20240155002
    Abstract: A first controller of a first device monitors communication to a first vehicle connected to the network. Further, when it is detected that an attack on the first vehicle is being carried out from the attack source device, the first controller transmits a first command for activating a honeypot server simulating a vehicle system of the first vehicle to the second device and transmits a second command for transferring packets transmitted from the attacking device to the first vehicle to the second device to a communication device that relays communication to the first vehicle in the network. Further, a second controller of a second device processes packets transmitted from the attack source device to the first vehicle and transferred to the second device by the communication device.
    Type: Application
    Filed: November 1, 2023
    Publication date: May 9, 2024
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Kazuya OKADA
  • Publication number: 20240106791
    Abstract: An information processing apparatus comprises a controller configured to execute: obtaining, from a user device, a query requesting name resolution of a first device accessible via a wide area network by DNS protocol; obtaining a first IP address, which is an IP address of the first device, based on the query; generating a second IP address that is a dummy IP address corresponding to the first IP address; replacing the first IP address with the second IP address, and transmitting a response to the query to the user device, with the second IP address as result of the name resolution; when a connection request addressed to the second IP address is received from the user device, transmitting the connection request to the wide area network, after replacing a destination from the second IP address to the first IP address.
    Type: Application
    Filed: September 25, 2023
    Publication date: March 28, 2024
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Kazuya OKADA
  • Publication number: 20230374236
    Abstract: A prepreg containing a matrix resin containing: a polyetherimide resin (A) having a repeating unit represented by General Formula (A); and carbon fibers, in which the matrix resin satisfies Condition (1). Condition (1): A tensile elongation at break (T1) of a film, obtained by extrusion-molding the matrix resin into a film shape, in a TD direction, and a tensile elongation at break (T2) of the film in the TD direction after immersing of the film for 1,000 hours in a specific oil at 23° C. are measured, and a tensile elongation retention rate obtained by Expression (1) is 15% or greater and 90% or less. Tensile Elongation Retention Rate=(Tensile Elongation at Break (T2)/Tensile Elongation at Break (T1))×100 . . . (1) (in Formula (a), m is a number of 5 to 1,500.
    Type: Application
    Filed: August 3, 2023
    Publication date: November 23, 2023
    Applicant: Mitsubishi Chemical Corporation
    Inventors: Yuma FURUHASHI, Kazuya OKADA
  • Publication number: 20230197668
    Abstract: A power semiconductor module includes a plurality of self-arc-extinguishing semiconductor elements, a printed wiring board, a plurality of conductive joining members, and a plurality of conductive gate wires. The printed wiring board includes an insulating substrate, a source conductive pattern, and a gate conductive pattern. The plurality of self-arc-extinguishing semiconductor elements each include a source electrode and a gate electrode. The source electrodes are joined to the source conductive pattern by means of the plurality of conductive joining members. The plurality of conductive gate wires connect the gate electrodes and the gate conductive pattern.
    Type: Application
    Filed: July 8, 2020
    Publication date: June 22, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshiko TAMADA, Seiji OKA, Shota MORISAKI, Kazuya OKADA
  • Publication number: 20220415738
    Abstract: A power semiconductor device in which the size of an insulating substrate is reduced and connection failure can be suppressed includes an insulating substrate, a semiconductor element, and a printed circuit board. The semiconductor element is bonded to one main surface of the insulating substrate. The printed circuit board is bonded to face the semiconductor element. The semiconductor element has a main electrode and a signal electrode. The printed circuit board includes a core member, a first conductor layer, and a second conductor layer. The second conductor layer has a bonding pad. The printed circuit board has a missing portion. A metal column portion is arranged to pass through the inside of the missing portion and reach the insulating substrate. The signal electrode and the bonding pad are connected by a metal wire. The metal column portion and the insulating substrate are bonded.
    Type: Application
    Filed: November 18, 2020
    Publication date: December 29, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Nobuhiro ASAJI, Kazuya OKADA, Hidetoshi ISHIBASHI
  • Patent number: 10601307
    Abstract: The object is to provide a technology for enabling detection of the voltage resistance in an assembled snubber substrate. A semiconductor device includes: a snubber substrate fixed to a base while being spaced from a p electrode and an n electrode; a snubber circuit disposed on the snubber substrate and electrically connected to the p electrode and the n electrode; and a semiconductor element electrically connected to the snubber circuit. The base includes an insulating component insulating the p electrode, the n electrode, and the snubber substrate from one another.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: March 24, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yasutaka Shimizu, Yuji Miyazaki, Kazuya Okada
  • Publication number: 20200083801
    Abstract: The object is to provide a technology for enabling detection of the voltage resistance in an assembled snubber substrate. A semiconductor device includes: a snubber substrate fixed to a base while being spaced from a p electrode and an n electrode; a snubber circuit disposed on the snubber substrate and electrically connected to the p electrode and the n electrode; and a semiconductor element electrically connected to the snubber circuit. The base includes an insulating component insulating the p electrode, the n electrode, and the snubber substrate from one another.
    Type: Application
    Filed: June 24, 2019
    Publication date: March 12, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yasutaka Shimizu, Yuji Miyazaki, Kazuya Okada
  • Patent number: 10504817
    Abstract: Provided is a technique for improving product attachment. In a semiconductor device, the following expression is satisfied by an angle A formed by an imaginary line connecting two attachment holes together and an imaginary line connecting together a lowest point of one of two projections positioned in a surrounding portion of one of the two attachment holes and a contact point between a bulge and a heat sink, with a screw fastened to the heat sink through the one attachment hole, where M represents a vertical direction between the lower end of a body and the lower end of a case, where W represents a bulge amount of the bulge, where T represents a height of the projection, where L represents a horizontal distance from the outer peripheral end of the case to the outer peripheral end of the heat dissipation plate: 0<A<arctan((M+W?T)/L).
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: December 10, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Okada, Hiroki Muraoka, Koichi Masuda, Yasutaka Shimizu, Shoji Izumi
  • Publication number: 20190074238
    Abstract: Provided is a technique for improving product attachment. In a semiconductor device, the following expression is satisfied by an angle A formed by an imaginary line connecting two attachment holes together and an imaginary line connecting together a lowest point of one of two projections positioned in a surrounding portion of one of the two attachment holes and a contact point between a bulge and a heat sink, with a screw fastened to the heat sink through the one attachment hole, where M represents a vertical direction between the lower end of a body and the lower end of a case, where W represents a bulge amount of the bulge, where T represents a height of the projection, where L represents a horizontal distance from the outer peripheral end of the case to the outer peripheral end of the heat dissipation plate: 0<A<arctan ((M+W?T)/L).
    Type: Application
    Filed: June 11, 2018
    Publication date: March 7, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazuya OKADA, Hiroki MURAOKA, Koichi MASUDA, Yasutaka SHIMIZU, Shoji IZUMI
  • Patent number: 10069998
    Abstract: An image forming apparatus according to an embodiment includes a paper supply unit. An image forming unit forms an image on paper supplied from the paper supply unit. A reading unit generates image information by reading an original document, the generated image information corresponding to the original document. An input unit receives input designation of a memo region in the generated image information. A control unit determines a color of the original document based on the generated image information. The image forming unit forms a memo image in the designated memo region on the paper supplied from the paper supply unit with a color different from the determined color of the original document.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: September 4, 2018
    Assignees: Kabushiki Kaisha Toshiba, Toshiba TEC Kabushiki Kaisha
    Inventors: Kazuya Okada, Tsukasa Tanda
  • Patent number: 9860401
    Abstract: An image forming apparatus comprises a sensor, a base, a clamping section and a limiting section. The sensor includes a hook having a claw section. The sensor is held on the base. The clamping section and the limiting section are arranged on the base. The claw section is clamped with the clamping section. The limiting section is elastically deformable when the sensor is mounted on the base. When the claw section is clamped with the clamping section, the limiting section faces the hook from the opposite side of the clamping section so as to limit the position of the hook.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: January 2, 2018
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHA
    Inventor: Kazuya Okada
  • Publication number: 20170230530
    Abstract: An image forming apparatus according to an embodiment includes a paper supply unit. An image forming unit forms an image on paper supplied from the paper supply unit. A reading unit generates image information by reading an original document, the generated image information corresponding to the original document. An input unit receives input designation of a memo region in the generated image information. A control unit determines a color of the original document based on the generated image information. The image forming unit forms a memo image in the designated memo region on the paper supplied from the paper supply unit with a color different from the determined color of the original document.
    Type: Application
    Filed: February 2, 2017
    Publication date: August 10, 2017
    Inventors: Kazuya OKADA, Tsukasa TANDA
  • Publication number: 20170104883
    Abstract: An image forming apparatus comprises a sensor, a base, a clamping section and a limiting section. The sensor includes a hook having a claw section. The sensor is held on the base. The clamping section and the limiting section are arranged on the base. The claw section is clamped with the clamping section. The limiting section is elastically deformable when the sensor is mounted on the base. When the claw section is clamped with the clamping section, the limiting section faces the hook from the opposite side of the clamping section so as to limit the position of the hook.
    Type: Application
    Filed: December 22, 2016
    Publication date: April 13, 2017
    Inventor: Kazuya Okada
  • Patent number: 9565325
    Abstract: An image forming apparatus comprises a sensor, a base, a clamping section and a limiting section. The sensor includes a hook having a claw section. The sensor is held on the base. The clamping section and the limiting section are arranged on the base. The claw section is clamped with the clamping section. The limiting section is elastically deformable when the sensor is mounted on the base. When the claw section is clamped with the clamping section, the limiting section faces the hook from the opposite side of the clamping section so as to limit the position of the hook.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: February 7, 2017
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHA
    Inventor: Kazuya Okada
  • Publication number: 20170026531
    Abstract: An image forming apparatus comprises a sensor, a base, a clamping section and a limiting section. The sensor includes a hook having a claw section. The sensor is held on the base. The clamping section and the limiting section are arranged on the base. The claw section is clamped with the clamping section. The limiting section is elastically deformable when the sensor is mounted on the base. When the claw section is clamped with the clamping section, the limiting section faces the hook from the opposite side of the clamping section so as to limit the position of the hook.
    Type: Application
    Filed: July 24, 2015
    Publication date: January 26, 2017
    Inventor: Kazuya Okada
  • Patent number: 9298096
    Abstract: An alkaline development-type curable resin composition having an excellent strength against tearing, breaking, distortion and torsion, and excellent toughness, a cured product of the curable resin composition, a printed circuit board having the cured product, and a process for manufacturing the cured product are disclosed. A curable resin composition is obtained, which contains (A) a thermoplastic resin, (B) a thermosetting component, (C) an alkali-soluble component, and at least one of (D-1) a photopolymerization initiator and (D-2) a photo-base generator, the thermoplastic resin (A) having two or more glass transition points including two glass transition points Tgx and Tgy, which satisfy Tgx>30° C. and Tgy<0° C. and the thermosetting component (B) having a glass transition point Tgz, which satisfies Tgz?Tgy+20° C. Moreover, a cured product of the curable resin composition, a printed circuit board having the cured product, and a process for manufacturing the cured product are obtained.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: March 29, 2016
    Assignee: Taiyo Ink Mfg. Co., Ltd.
    Inventors: Kazuya Okada, Shuichi Yamamoto, Shoji Minegishi, Daichi Okamoto, Xiaozhu Wei