Patents by Inventor KAZUYA UDA

KAZUYA UDA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11929432
    Abstract: A semiconductor device including a source region formed at one main face of a semiconductor substrate; a drain region formed at the one main face and connected to the source region through a channel region; a gate electrode formed above the channel region; a drift layer formed at the one main face at a position between a lower portion of the gate electrode and the drain region; a trench including an opening in which one end is at the lower portion of the gate electrode and another end is at a position adjacent to the drain region, the trench being formed in the semiconductor substrate at a predetermined depth from the one main face to cut vertically across the drift layer; and an electrical field weakening portion, provided at vicinity of the one end, that weaken an electrical field generated between the source region and the drain region.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: March 12, 2024
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Kazuya Uda
  • Publication number: 20210066496
    Abstract: A semiconductor device including a source region formed at one main face of a semiconductor substrate; a drain region formed at the one main face and connected to the source region through a channel region; a gate electrode formed above the channel region; a drift layer formed at the one main face at a position between a lower portion of the gate electrode and the drain region; a trench including an opening in which one end is at the lower portion of the gate electrode and another end is at a position adjacent to the drain region, the trench being formed in the semiconductor substrate at a predetermined depth from the one main face to cut vertically across the drift layer; and an electrical field weakening portion, provided at vicinity of the one end, that weaken an electrical field generated between the source region and the drain region.
    Type: Application
    Filed: November 13, 2020
    Publication date: March 4, 2021
    Inventor: KAZUYA UDA
  • Publication number: 20190305129
    Abstract: A semiconductor device including: a source region formed at one main face of a semiconductor substrate; a drain region formed at the one main face and connected to the source region through a channel region; a gate electrode formed above the channel region; a drift layer formed at the one main face at a position between a lower portion of the gate electrode and the drain region; a trench including an opening in which one end is at the lower portion of the gate electrode and another end is at a position adjacent to the drain region, the trench being formed in the semiconductor substrate at a predetermined depth from the one main face to cut vertically across the drift layer; and an electrical field weakening portion, provided at vicinity of the one end, that weaken an electrical field generated between the source region and the drain region.
    Type: Application
    Filed: March 15, 2019
    Publication date: October 3, 2019
    Inventor: KAZUYA UDA