Patents by Inventor Kazuyo Endo

Kazuyo Endo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10697078
    Abstract: A method of forming Cu plating of the present invention includes: a first step of forming a Cu seed layer on one of surfaces of a substrate such that an average grain size is 50 nm or more and 300 nm or less; a second step of forming an oxide film on a surface of the Cu seed layer in an oxygen atmosphere; a third step of removing a part of the oxide film; and a fourth step of feeding power to the Cu seed layer to form Cu plating on a surface of the oxide film on the Cu seed layer by electrolytic plating.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: June 30, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yuji Sato, Jun Fujita, Motoru Yoshida, Kazuyo Endo
  • Publication number: 20190062938
    Abstract: A method of forming Cu plating of the present invention includes: a first step of forming a Cu seed layer on one of surfaces of a substrate such that an average grain size is 50 nm or more and 300 nm or less; a second step of forming an oxide film on a surface of the Cu seed layer in an oxygen atmosphere; a third step of removing a part of the oxide film; and a fourth step of feeding power to the Cu seed layer to form Cu plating on a surface of the oxide film on the Cu seed layer by electrolytic plating.
    Type: Application
    Filed: November 12, 2015
    Publication date: February 28, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yuji SATO, Jun FUJITA, Motoru YOSHIDA, Kazuyo ENDO
  • Patent number: 9721915
    Abstract: A semiconductor device capable of inhibiting oxidation of a Cu wiring even in a high temperature operation. The semiconductor device includes a semiconductor substrate having a main surface, a Cu electrode which is selectively formed on a side of the main surface of the semiconductor substrate, an antioxidant film formed on an upper surface of the Cu electrode except an end portion thereof, an organic resin film which is formed on the main surface of the semiconductor substrate and covers a side surface of the Cu electrode and the end portion of the upper surface thereof, and a diffusion prevention film formed between the organic resin film and the main surface of the semiconductor substrate and between the organic resin film and the side surface and the end portion of the upper surface of the Cu electrode, being in contact therewith.
    Type: Grant
    Filed: February 16, 2015
    Date of Patent: August 1, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Motoru Yoshida, Kazuyo Endo, Jun Fujita, Hiroaki Okabe, Kazuyuki Sugahara
  • Publication number: 20160358874
    Abstract: A semiconductor device capable of inhibiting oxidation of a Cu wiring even in a high temperature operation. The semiconductor device includes a semiconductor substrate having a main surface, a Cu electrode which is selectively formed on a side of the main surface of the semiconductor substrate, an antioxidant film formed on an upper surface of the Cu electrode except an end portion thereof, an organic resin film which is formed on the main surface of the semiconductor substrate and covers a side surface of the Cu electrode and the end portion of the upper surface thereof, and a diffusion prevention film formed between the organic resin film and the main surface of the semiconductor substrate and between the organic resin film and the side surface and the end portion of the upper surface of the Cu electrode, being in contact therewith.
    Type: Application
    Filed: February 16, 2015
    Publication date: December 8, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Motoru YOSHIDA, Kazuyo ENDO, Jun FUJITA, Hiroaki OKABE, Kazuyuki SUGAHARA
  • Patent number: 9508564
    Abstract: A plurality of semiconductor element is formed on a substrate. A plurality of sealing windows and a support portion supporting the plurality of sealing windows are formed on a SOI substrate. The SOI substrate is pressured against the substrate by using a pressurizing member and the plurality of sealing windows of the SOI substrate is bonded to the substrate via a low melting point glass member arranged around the plurality of semiconductor elements. The support portion is separated from the plurality of sealing windows bonded to the substrate.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: November 29, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshinori Yokoyama, Kazuyo Endo, Jun Fujita, Shinnosuke Soda, Kazuyasu Nishikawa, Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue
  • Publication number: 20150243530
    Abstract: A plurality of semiconductor element is formed on a substrate. A plurality of sealing windows and a support portion supporting the plurality of sealing windows are formed on a SOI substrate. The SOI substrate is pressured against the substrate by using a pressurizing member and the plurality of sealing windows of the SOI substrate is bonded to the substrate via a low melting point glass member arranged around the plurality of semiconductor elements. The support portion is separated from the plurality of sealing windows bonded to the substrate.
    Type: Application
    Filed: July 19, 2013
    Publication date: August 27, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshinori Yokoyama, Kazuyo Endo, Jun Fujita, Shinnosuke Soda, Kazuyasu Nishikawa, Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue
  • Patent number: 8816493
    Abstract: A semiconductor device includes: a substrate; a semiconductor element on the substrate; an interconnection on the substrate and electrically connected to the semiconductor element; a window frame member on the substrate, surrounding the semiconductor element, and in contact with the interconnection; and a sealing window bonded to the window frame member and encapsulating the semiconductor element. The window frame member is a low melting glass and has a sheet resistance of 106-1010 ?/?.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: August 26, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue, Yoshinori Yokoyama, Jun Fujita, Kazuyo Endo, Shinnosuke Soda, Kazuyasu Nishikawa
  • Publication number: 20140137940
    Abstract: A solar cell module is obtained by the following method. In a step of sealing a solar cell module using laminated glass, a solar cell and a translucent intermediate film layer which seals the solar cell are interposed between a front side glass substrate and a rear side glass substrate. A sealing member in which an insertion part and an exterior part are formed by folding a sealing sheet having a bonding surface on one side, is employed in the module peripheral edge. The insertion part is inserted between the front side glass substrate and the rear side glass substrate, and bonding surfaces thereof are bonded to the front side glass substrate and the rear side glass substrate. A bonding surface of the exterior part is bonded to an end face of at least either of the front side glass substrate and the rear side glass substrate.
    Type: Application
    Filed: June 18, 2012
    Publication date: May 22, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazuyo Endo, Katsuhiro Imada, Jun Fujita
  • Publication number: 20140077280
    Abstract: A semiconductor device includes: a substrate; a semiconductor element on the substrate; an interconnection on the substrate and electrically connected to the semiconductor element; a window frame member on the substrate, surrounding the semiconductor element, and in contact with the interconnection; and a sealing window bonded to the window frame member and encapsulating the semiconductor element. The window frame member is a low melting glass and has a sheet resistance of 106-1010 ?/?.
    Type: Application
    Filed: June 19, 2013
    Publication date: March 20, 2014
    Inventors: Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue, Yoshinori Yokoyama, Jun Fujita, Kazuyo Endo, Shinnosuke Soda, Kazuyasu Nishikawa
  • Publication number: 20120204932
    Abstract: A thin-film solar battery module that can avoid a decrease in power generation efficiency caused by influences of meandering of a wiring material, relax a stress due to a difference in a thermal expansion coefficient between a substrate material and the wiring material, and suppress warpage of a substrate and separation of a joined part of an electrode and a wiring. The thin-film solar battery module includes a thin-film solar battery device including serially connecting a plurality of thin-film solar battery cells to each other and a bus bar wiring provided at a positive-side end and a negative-side end of the thin-film solar battery device. Additionally, the bus bar wiring couples a plurality of conductive members to each other in a partially superimposed manner.
    Type: Application
    Filed: October 20, 2010
    Publication date: August 16, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuyo Endo, Jun Fujita, Takashi Tokunaga