Abstract: A semiconductor device according to the present invention includes a substrate, an IC chip that is fixed over the substrate, a conductor that is disposed over a surface of the substrate, a solder resist that covers the surface of the substrate and the conductor and includes an opening that exposes the conductor in a section corresponding to a fixed surface of the IC chip, and an adhesive that contacts an exposed part of the conductor, in which the exposed part is made by the opening.

Abstract: When reading out flash ROM data from an external interface circuit, a clock for a CPU is stopped only in a period during which the flash ROM is read out and fetch data at the CPU side are held in a fetch bus interface; thereafter, an address of the data that are desired to be read out for the flash ROM is output and the data are taken in. When rewriting into the flash ROM, a fetch target from the CPU is switched to a tuning RAM that stores a copy of the data for a rewrite region, and during that period, data rewrite of the flash ROM is carried out. Reading and writing of the flash ROM data from outside is made possible while the CPU is kept in operation.

Abstract: Flash ROMs operate at a speed slower than that of a CPU. In order to raise the operating speed of a single-chip microcomputer, therefore, interleaving is adopted and a plurality of flash ROMs are operated alternately to obtain an apparent operating speed equivalent to that of a CPU. Read clock generating circuits are placed in close proximity to clock input pins of respective ones of the flash ROMs and supply the flash ROMs with read clocks obtained by dividing down the frequency of a system clock. Delay ascribable to wiring is eliminated from the read clocks as a result.

Abstract: When reading out flash ROM data from an external interface circuit, a clock for a CPU is stopped only in a period during which the flash ROM is read out and fetch data at the CPU side are held in a fetch bus interface; thereafter, an address of the data that are desired to be read out for the flash ROM is output and the data are taken in. When rewriting into the flash ROM, a fetch target from the CPU is switched to a tuning RAM that stores a copy of the data for a rewrite region, and during that period, data rewrite of the flash ROM is carried out. Reading and writing of the flash ROM data from outside is made possible while the CPU is kept in operation.

Abstract: Flash ROMs operate at a speed slower than that of a CPU. In order to raise the operating speed of a single-chip microcomputer, therefore, interleaving is adopted and a plurality of flash ROMs are operated alternately to obtain an apparent operating speed equivalent to that of a CPU. Read clock generating circuits are placed in close proximity to clock input pins of respective ones of the flash ROMs and supply the flash ROMs with read clocks obtained by dividing down the frequency of a system clock. Delay ascribable to wiring is eliminated from the read clocks as a result.

Abstract: A monitored burn-in test system and a monitored burn-in test method of microcomputers, which are capable of implementing the monitored burn-in test without increasing a load of software and improving the function of a tester unit. When microcomputers supply a tester unit with measurement data stored in a data compressing circuit comprised of a linear feedback resister, test data outputted by all of the microcomputers can be read synchronously into the tester unit by shifting out the measurement data synchronously with a monitoring clock signal outputted by the tester unit. Thus, it is made possible to monitor the test results of all microcomputers at the same time in the tester unit. Therefore, it can be avoided that a load of software gets heavier since the monitoring of the test results is certainly executed by the tester unit.