Abstract: A substrate processing apparatus includes a device management controller including a parts management control part configured to monitor the state of parts constituting the apparatus, a device state monitoring control part configured to monitor integrity of device data obtained from an operation state of the parts constituting the apparatus, and a data matching control part configured to monitor facility data provided from a factory facility to the apparatus. The device management controller is configured to derive information evaluating the operation state of the apparatus based on a plurality of monitoring result data selected from a group consisting of maintenance timing monitoring result data acquired by the parts management control part, device state monitoring result data acquired by the device state monitoring control part, and utility monitoring result data acquired by the data matching control part.

Abstract: A new design concept is presented and demonstrated for the fabrication of active and passive components in integrated circuit (IC) devices for microwave signal transmission. High circuit packing density is desirable but the current configurations of the conventional flat strip type conductors present physical limitations to achieving such an objective. The new conductor configuration not only overcomes such circuit packing problems of the conventional line design, but provides additional improvements in performance parameters, such as lower resistance and lower parasitic interactions, an ability to fabricate circuits to design specifications and to improve reliability at low cost. The new concept has been applied to the fabrication of transmission lines, capacitors, inductors, air bridges and to formulating the fabrication steps for a FET. Polyamide film enables an improved fabrication step to be performed in the invention, and a new processing technique for polyimide material has also been demonstrated.

Abstract: A new design concept is presented and demonstrated for the fabrication of active and passive components in integrated circuit (IC) devices for microwave signal transmission. High circuit packing density is desirable but the current configurations of the conventional flat strip type conductors present physical limitations to achieving such an objective. The new conductor configuration not only overcomes such circuit packing problems of the conventional line design, but provides additional improvements in performance parameters, such as lower circuit resistance and lower parasitic interactions; an ability to fabricate circuits to design specifications and to improve reliability at low cost. The new concept has been applied to the fabrication of transmission lines, capacitors, inductors, air bridges and to formulating the fabrication steps for a FET.

Abstract: A new design concept is presented and demonstrated for the fabrication of active and passive components in integrated circuit (IC) devices for microwave signal transmission. High circuit packing density is desirable but the current configurations of the conventional flat strip type conductors present physical limitations to achieving such an objective. The new conductor configuration not only overcomes such circuit packing problems of the conventional line design, but provides additional improvements in performance parameters, such as lower circuit resistance and lower parasitic interactions; an ability to fabricate circuits to design specifications and to improve reliability at low cost. The new concept has been applied to the fabrication of transmission lines, capacitors, inductors, air bridges and to formulating the fabrication steps for a FET.

Abstract: A semiconductor circuit device is disclosed in which an impurity ion implanted region is formed in a substrate, a Schottky junction type gate electrode is formed above the impurity ion implanted region, and a source electrode and a drain electrode are formed on both sides of the gate electrode. In this device, an InGaP barrier layer is formed between the substrate and the electrodes, a cap layer comprising a semiconductor free from In as a constituent is formed between the InGaP barrier layer and the electrodes, and the gate electrode is formed of a refractory metal.

Abstract: A semiconductor circuit device is disclosed in which an impurity ion implanted region is formed in a substrate, a Schottky junction type gate electrode is formed above the impurity ion implanted region, and a source electrode and a drain electrode are formed on both sides of the gate electrode. In this device, an InGaP barrier layer is formed between the substrate and the electrodes, a cap layer comprising a semiconductor free from In as a constituent is formed between the InGaP barrier layer and the electrodes, and the gate electrode is formed of a refractory metal.

Abstract: A new design concept is presented and demonstrated for the fabrication of active and passive components in integrated circuit (IC) devices for microwave signal transmission. High circuit packing density is desirable but the current configurations of the conventional flat strip type conductors present physical limitations to achieving such an objective. The new conductor configuration not only overcomes such circuit packing problems of the conventional line design, but provides additional improvements in performance parameters, such as lower circuit resistance and lower parasitic interactions; an ability to fabricate circuits to design specifications and to improve reliability at low cost. The new concept has been applied to the fabrication of transmission lines, capacitors, inductors, air bridges and to formulating the fabrication steps for a FET.

Abstract: A field effect transistor device is constituted by a semiinsulating substrate consisting of a compound semiconductor, an N type semiconductor layer formed on the substrate, a plurality of P type semiconductor gate regions aligned along a straight line and extending through the semiconductor layer to reach the substrate, source and drain electrodes disposed on the semiconductor layer on the opposite sides of the drain regions, a gate electrode having an ohmic contact with the gate regions and having a Schottky contact with the semiconductor layer interposed between the gate regions. Two gate regions on the opposite ends of the array are in contact with the boundary region of the transistor.The field effect transistor device is useful for fabricating an integrated circuit and consumes less electric power. Further it reduces dispersion in the gate pinch off voltage and can be prepared at a high yield.

Abstract: In a field effect semiconductor device comprising a semi-insulator layer composed of a semiconductor material, an N conductivity type active layer made of the same semiconductor material and acting as a channel, spaced cathode and anode electrodes formed on the active layer, the cathode electrode being in ohmic contact with the active layer, and means for applying drive voltage across the cathode and anode electrodes for varying the electrons flowing through the active layer so as to vary output current, a P conductive region is provided beneath the anode electrode and extending through the active layer toward to or penetrating into the semiconductor layer.

Abstract: A method of manufacturing a field effect transistor uses a semiinsulating substrate consisting of a compound semiconductor, and an N type semiconductor layer formed on the substrate. The method comprises the steps of implanting ions of a P type impurity from the main surface of said semiconductor layer to form at least two P type gate regions which extend from the main surface to substantially reach said substrate and are disposed with a predetermined interval, and sintering metallic layers on the gate regions in ohmic contact and on opposite sides of the semiconductor layers with said semiconductor gate regions being interposed therebetween to form a gate, a source and a drain electrodes. Said implantation step further comprises a step of positioning at least two of said gate regions such that said gate regions come in contact with the boundary region of the transistor to be constructed.