Abstract: A packet converter according to an embodiment is mountable on a digital broadcast receiver. The packet converter includes: a variable-length packet acquirer configured to acquire a variable-length packet acquired by receiving digital broadcast signals; an analyzer configured to analyze at least a header between the header and a payload of the variable-length packet; a packet reassembler configured to reassemble, from the variable-length packet, a plurality of transport stream (TS) packets each having a TS header, wherein the packet reassembler is configured to set a value of a packet ID (PID) in the TS header based at least on an analysis result of the header of the variable-length packet; and a TS packet outputter configured to output the plurality of TS packets.

Abstract: A power supply circuit, wherein a power supply in a backup system is operational effectively even when a normal power supply to be used at a normal operation is turned off, including an A power supply system for supplying a first voltage to a circuit unit at a normal operation and a backup B power supply system, which starts to operate instantly when the A power supply system becomes abnormal to supply the first voltage to the circuit unit; wherein the B power supply system includes a regulator for outputting a second voltage equivalent to the first voltage, and a feedback circuit for detecting a voltage to be applied to the circuit unit and feeding back the detected voltage to the regulator; and the regulator adjusts an output voltage thereof, so that the voltage to be applied to the circuit unit becomes the first voltage when the voltage detected by the feedback circuit is lower than the first voltage.

Abstract: A power supply circuit, wherein a power supply in a backup system is operational effectively even when a normal power supply to be used at a normal operation is turned off, including an A power supply system for supplying a first voltage to a circuit unit at a normal operation and a backup B power supply system, which starts to operate instantly when the A power supply system becomes abnormal to supply the first voltage to the circuit unit; wherein the B power supply system includes a regulator for outputting a second voltage equivalent to the first voltage, and a feedback circuit for detecting a voltage to be applied to the circuit unit and feeding back the detected voltage to the regulator; and the regulator adjusts an output voltage thereof, so that the voltage to be applied to the circuit unit becomes the first voltage when the voltage detected by the feedback circuit is lower than the first voltage.

Abstract: An image signal processing apparatus provided with a plurality of image signal output units for outputting image signals, an image signal combining unit for combining a plurality of image signals output from the plurality of image signal output units, and a phase synchronization signal generation unit for synchronizing with a first reference signal of a first image signal output from a first image signal output unit among the plurality of image signal output units the phase of another reference signal of another image signal output from another image signal output unit other than the first image signal output unit so as to generate a signal, wherein the first image signal output unit outputs the first image signal based on the first reference signal to the image signal combining unit, the other image signal output units output image signals using clock signals based on their own phase synchronized oscillation signals to the image signal combining unit, and the image signal combining unit combines the pluralit

Abstract: An apparatus for recording and/or reproducing digital signals, such as PCM signals, as plural slanted tracks on a magnetic tape, includes a memory, first and second heads, a detection unit and a control unit. The memory stores the digital signals entering a terminal. The first head records the digital signals entering the terminal along with input address information. The second head is positioned on the downstream side of the first head in the running direction of the magnetic tape. The second head reads out the digital signals recorded on the magnetic tape by the first head along with the address information. The detection unit detects whether or not there is any error in the signal read out by the second head.

Abstract: A recording/reproducing method for recording/reproducing digital signals on plural slanted tracks of a tape-shaped recording medium, in which, even if some of the slanted tracks are erased due to junction recording or after-recording, the signals can be reproduced satisfactorily. The input digital signals are divided into upper order bits and lower order bits, and the upper order bits are further divided into upper order side bits and lower order side bits. The data corresponding to the upper order bits, the data corresponding to the upper order side bits of the lower order bits and the data corresponding to the lower order side bits of the lower order bits are recorded in respective different slanted tracks.

Abstract: A rotary head type recording and/or reproducing apparatus is so arranged as to be able to record on and/or reproduce from a recording track on a recording medium a time code which is not synchronized with the revolution of a rotary head, whereby even when the revolution period of the rotary head is special, the edition of the recording medium can be made with high accuracy and a track exclusively required by the time code becomes unnecessary. Also, a surplus calculating circuit for calculating a surplus when a number is divided by a divisor is disclosed, in which the surplus can be obtained only by the addition without carrying out the division in practice. Accordingly, time necessary for such calculation can be reduced and the scale of circuit arrangement can be miniaturized.

Abstract: Apparatus for reproducing digital signals which includes a phase locked loop circuit for generating a clock signal from a reproduced signal. The level of the reproduced signal is detected and the feedback loop of the phase locked looped circuit is controlled by the detected output such that when the reproduced signal is intermittently supplied to the phase locked loop circuit and has a burst-shape the oscillator within the phase locked loop circuit stably oscillates.