Patents by Inventor Kazuyoshi Ebe
Kazuyoshi Ebe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6977024Abstract: A semiconductor device, which is obtained by sticking an adhesive sheet 1 comprising a base material 2, an adhesive agent layer 3 formed on the base material 2 and conductor bodies 4 buried in the adhesive agent layer 3 to a semiconductor wafer, and removing the base material from the adhesive agent layer of the adhesive sheet 1. The adhesive agent layer 3 and a substrate are then aligned and the semiconductor wafer and the substrate are adhered via the adhesive agent layer 3 to avoid defects caused by fluidity of an under filling material.Type: GrantFiled: June 18, 2003Date of Patent: December 20, 2005Assignee: LINTEC CorporationInventors: Osamu Yamazaki, Kazuyoshi Ebe
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Patent number: 6911720Abstract: A semiconductor device, which is obtained by sticking an adhesive sheet 1 comprising a base material 2, an adhesive agent layer 3 formed on the base material 2 and conductor bodies 4 buried in the adhesive agent layer 3 to a semiconductor wafer, and removing the base material from the adhesive agent layer of the adhesive sheet 1. The adhesive agent layer 3 and a substrate are then aligned and the semiconductor wafer and the substrates are adhered via the adhesive agent layer 3 to thereby avoid defects caused by fluidity of an under filling material.Type: GrantFiled: March 28, 2002Date of Patent: June 28, 2005Assignee: LINTEC CorporationInventors: Osamu Yamazaki, Kazuyoshi Ebe
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Publication number: 20050124739Abstract: A sheet excellent in antistatic properties, transparency and impact strength, and a formed product thereof. The sheet is made of a resin composition comprising an elastomeric styrene polymer and component (B) in a mass ratio of from 98/2 to 80/20, wherein the elastomeric styrene polymer comprises styrene monomer units, (meth)acrylate monomer units, etc., and component (B) comprises (B1) an amino carboxylic acid having at least 6 carbon atoms, a lactam, or a salt of a diamine with a carboxylic acid, having at least 6 carbon atoms, (B2) at least one diol compound and (B3) a polyether ester amide having a C?4-20#191 dicarboxylic acid copolymerized.Type: ApplicationFiled: February 27, 2003Publication date: June 9, 2005Applicant: Denki Kagaku Kogyo Kabushiki KaishaInventors: Minoru Oda, Takeshi Miyakawa, Hideaki Nishimura, Kohji Taneichi, Kazuyoshi Ebe
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Patent number: 6900550Abstract: A semiconductor integrated circuit is adhered to the substrate and includes semiconductor integrated circuit electrodes. A hardened adhesive agent layer is formed from an adhesive agent with gradable adhesiveness and has conductor bodies buried therein. The adhesive agent includes a (meth)acrylate copolymer having a weight-average molecular weight of not less than 30,000, an epoxy resin having a weight-average molecular weight of 100 to 10,000, a photopolymerizable low molecular compound and thermal activation latent epoxy resin curing agent. The conductor bodies are connected with the semiconductor integrated circuit electrodes, and the adhesive agent layer is aligned with the substrate so that the conductor bodies buried in the adhesive agent layer and the substrate electrodes are electrically connected.Type: GrantFiled: June 18, 2003Date of Patent: May 31, 2005Assignee: LINTEC CorporationInventors: Osamu Yamazaki, Kazuyoshi Ebe
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Patent number: 6855418Abstract: A resin tie bar 1A is formed from a base material 10, 11 of a heat-resistant resin whose melting point is higher than the temperature during resin molding and an insulative adhesive layer 12 on the base material 10, 11 and formed from an insulative adhesive agent that may or may not be removable prior to resin molding depending upon its composition. The resin tie bar 1A is applied to the surface of the leads 22 of a lead frame, and resin molding is then performed, during which the resin tie bar 1A is pressed by a heated mold 3, which softens the insulative adhesive agent of the resin tie bar 1A and pushes it into the gaps 23 between the leads 22 of the lead frame. Thus the resin tie bar 1A can be easily formed into a shape that is favorable for the leads 22 of the lead frame.Type: GrantFiled: May 17, 2002Date of Patent: February 15, 2005Assignee: LINTEC CorporationInventors: Osamu Yamazaki, Hideo Senoo, Kazuyoshi Ebe
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Patent number: 6723619Abstract: Disclosed herein is a pressure sensitive adhesive sheet for fixing a semiconductor wafer during semiconductor wafer processing in vacuum, comprising a substrate and, superimposed on one side or both sides thereof, a layer of ultraviolet curable pressure sensitive adhesive composition comprising an ultraviolet curable copolymer having ultraviolet polymerizable groups as side chains and a phosphorous photopolymerization initiator. The pressure sensitive adhesive sheet for semiconductor wafer processing, even in the processing of a semiconductor wafer in vacuum, is free from generating gases from the pressure sensitive adhesive sheet, thereby avoiding wafer deformation attributed to evaporated gas components and adhesive transfer caused thereby.Type: GrantFiled: May 17, 2002Date of Patent: April 20, 2004Assignee: Lintec CorporationInventors: Koichi Nagamoto, Kazuyoshi Ebe
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Patent number: 6718223Abstract: A method of processing a semiconductor wafer. The wafer is secured to a wafer supporting member having a data carrier. Information required for working the semiconductor wafer is input to the data carrier. The wafer is then worked according to information read from the data carrier. The data carrier is configured to permit operations such as back grinding, dicing and pickup of the wafer, and prevents wafer breakage when the wafer is carried between different operations.Type: GrantFiled: May 17, 2000Date of Patent: April 6, 2004Assignee: Lintec CorporationInventors: Yuichi Iwakata, Hayato Noguchi, Katsuhisa Taguchi, Kazuyoshi Ebe
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Patent number: 6702910Abstract: A process for producing a chip, comprising the steps of: setting an object to be diced on a pressure sensitive adhesive sheet for producing chip comprising at least one layer of shrinkable film, an expansible film and a pressure sensitive adhesive layer for setting the object; fixing edges of the pressure sensitive adhesive sheet for producing chip; dicing the object into chips, and shrinking the shrinkable film to thereby expand chip spacings. In the process for producing small chips such as semiconductor chips, chip spacings can be expanded without the need to conduct the conventional expansion step.Type: GrantFiled: August 28, 2001Date of Patent: March 9, 2004Assignee: Lintec CorporationInventors: Hayato Noguchi, Kazuyoshi Ebe
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Publication number: 20030226640Abstract: A semiconductor device, which is obtained by sticking a conductor bodies attached adhesive sheet 1 comprising a base material 2, an adhesive agent layer 3 formed on the base material 2 and conductor bodies 4 buried in the adhesive agent layer 3 to a semiconductor wafer, removing the base material from the adhesive agent layer of the conductor bodies attached adhesive sheet 1, then, the adhesive agent layer 3 and a substrate are aligned and the semiconductor wafer and the substrates are adhered via the adhesive agent layer 3, has no defects causedby fluidity of an under filling material.Type: ApplicationFiled: June 18, 2003Publication date: December 11, 2003Inventors: Osamu Yamazaki, Kazuyoshi Ebe
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Publication number: 20030031866Abstract: A pressure sensitive adhesive double coated sheet comprising a shrink substrate and, superimposed on both sides thereof, pressure sensitive adhesive layers, at least one of the pressure sensitive adhesive layers being composed of an energy radiation curable pressure sensitive adhesive. The pressure sensitive adhesive double coated sheet enables efficient processing of a work piece with high precision. In particular, the pressure sensitive adhesive double coated sheet is suitable to a process capable of producing IC chips of high thickness precision with high yield by reducing warpage and minimizing carrying breakage in the grinding of extremely thin or large diameter silicon wafers and capable of performing back grinding and dicing in the same configuration.Type: ApplicationFiled: July 16, 2002Publication date: February 13, 2003Applicant: Lintec CorporationInventors: Hayato Noguchi, Yoshihisa Mineura, Kazuyoshi Ebe
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Publication number: 20030008139Abstract: Disclosed herein is a pressure sensitive adhesive sheet for fixing a semiconductor wafer in semiconductor wafer processing in vacuum, comprising a substrate and, superimposed on one side or both sides thereof, a layer of ultraviolet curable pressure sensitive adhesive composition comprising an ultraviolet curable copolymer having ultraviolet polymerizable groups as side chains and a phosphorous photopolymerization initiator. The invention is intended to provide a pressure sensitive adhesive sheet for semiconductor wafer processing which, even in the processing of a semiconductor wafer in vacuum, is free from generating gases from the pressure sensitive adhesive sheet to thereby enable avoiding wafer deformation attributed to evaporated gas components and adhesive transfer caused thereby.Type: ApplicationFiled: May 17, 2002Publication date: January 9, 2003Applicant: LINTEC CORPORATIONInventors: Koichi Nagamoto, Kazuyoshi Ebe
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Publication number: 20020192464Abstract: When a resin tie bar 1A comprising a base material 11 composed of a heat-resistant resin whose melting point is higher than the temperature during resin molding, and an insulative adhesive layer 12 formed on the base material 11 and composed of an insulative adhesive agent, is applied to the surface of the leads 22 of a lead frame, and molding resin is then performed, the resin tie bar 1A is pressed by a heated mold 3, which softens the insulative adhesive agent of the resin tie bar 1A and pushes it into the gaps 23 between the leads 22 of the lead frame. Thus the resin tie bar 1A can be easily formed into a shape that is favorable for the leads 22 of the lead frame.Type: ApplicationFiled: May 17, 2002Publication date: December 19, 2002Inventors: Osamu Yamazaki, Hideo Senoo, Kazuyoshi Ebe
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Patent number: 6465330Abstract: A surface protective sheet for semiconductor wafer, used in wafer back grinding during a process comprising (1) forming grooves on the surface a of semiconductor wafer furnished with a circuit so that the cutting depth of the grooves are smaller than the thickness of the wafer and (2) grinding the back of the wafer so that the thickness of the wafer is reduced and that the wafer is finally divided into individual chips. The above surface protective sheet is comprised of a substrate and, superimposed thereon, a pressure sensitive adhesive layer having an elastic modulus of at least 1.0×105 Pa at 40° C. This surface protective sheet is applicable to a process which enables producing extremely thin IC chips with high yield.Type: GrantFiled: August 18, 1999Date of Patent: October 15, 2002Assignees: Lintec Corporation, Kabushiki Kaisha ToshibaInventors: Kazuhiro Takahashi, Kazuyoshi Ebe, Shinya Takyu
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Publication number: 20020140093Abstract: A semiconductor device, which is obtained by sticking a conductor bodies attached adhesive sheet 1 comprising a base material 2, an adhesive agent layer 3 formed on the base material 2 and conductor bodies 4 buried in the adhesive agent layer 3 to a semiconductor wafer, removing the base material from the adhesive agent layer of the conductor bodies attached adhesive sheet 1, then, the adhesive agent layer 3 and a substrate are aligned and the semiconductor wafer and the substrates are adhered via the adhesive agent layer 3, has no defects caused by fluidity of an under filling material.Type: ApplicationFiled: March 28, 2002Publication date: October 3, 2002Inventors: Osamu Yamazaki, Kazuyoshi Ebe
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Patent number: 6436795Abstract: A process for producing semiconductor chips, comprising the following steps. A semiconductor wafer having a surface overlaid with circuits is provided. An arrangement wherein a back of the semiconductor wafer is fixed on a dicing tape and wherein a pressure sensitive adhesive double coated sheet is stuck to a circuit surface of the semiconductor wafer is formed. The pressure sensitive adhesive double coated sheet comprises a shrinkable base having its both sides overlaid with pressure sensitive adhesive layers. At least one of the layers is composed of an energy radiation curable pressure sensitive adhesive. The semiconductor wafer together with the pressure sensitive adhesive double coated sheet is diced by each circuit to thereby form semiconductor chips. The semiconductor chips are fixed on a transparent hard plate by adherence of the pressure sensitive adhesive layer of the pressure sensitive adhesive double coated sheet remote from the semiconductor chips.Type: GrantFiled: February 6, 2001Date of Patent: August 20, 2002Assignee: Lintec CorporationInventors: Hayato Noguchi, Kazuyoshi Ebe
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Patent number: 6398892Abstract: Disclosed herein is a pressure sensitive adhesive double coated sheet comprising a shrink substrate and, superimposed on both sides thereof, pressure sensitive adhesive layers, at least one of the pressure sensitive adhesive layers being composed of an energy radiation curable pressure sensitive adhesive. The pressure sensitive adhesive double coated sheet according to the invention enables efficiently processing a work piece with high precision. In particular the pressure sensitive adhesive double coated sheet is suitable to a process capable of producing IC chips of high thickness precision with high yield by reducing warpage and minimizing carrying breakage in the grinding of extremely thin or large diameter silicon wafers and capable of performing back grinding and dicing in the same configuration. Further, the invention provides a process of producing semiconductors of high reliability in which the above pressure sensitive adhesive double coated sheet is used.Type: GrantFiled: August 25, 1999Date of Patent: June 4, 2002Assignee: Lintec CorporationInventors: Hayato Noguchi, Yoshihisa Mineura, Kazuyoshi Ebe
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Publication number: 20020025432Abstract: A process for producing a chip, comprising the steps of:Type: ApplicationFiled: August 28, 2001Publication date: February 28, 2002Inventors: Hayato Noguchi, Kazuyoshi Ebe
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Patent number: 6312800Abstract: A process for producing a chip, comprising the steps of: setting an object to be diced on a pressure sensitive adhesive sheet for producing chip comprising at least one layer of shrinkable film, an expansible film and a pressure sensitive adhesive layer for setting the object; fixing edges of the pressure sensitive adhesive sheet for producing chip; dicing the object into chips, and shrinking the shrinkable film to thereby expand chip spacings. In the process for producing small chips such as semiconductor chips, chip spacings can be expanded without the need to conduct the conventional expansion step.Type: GrantFiled: February 6, 1998Date of Patent: November 6, 2001Assignee: Lintec CorporationInventors: Hayato Noguchi, Kazuyoshi Ebe
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Patent number: 6297076Abstract: Disclosed is a process for preparing a semiconductor device comprising the steps of adhering a back surface of a wafer, a front surface of which has been formed a circuit, onto the radiation curable adhesive layer, dicing the wafer into chips, rinsing, drying, irradiating the adhesive layer with radiation to cure said adhesive layer, expanding the adhesive sheet if necessary to make the chips apart from each other, then picking up the chips, mounting the picked chips on a lead frame, bonding, and molding to give such a structure that the back surfaces of the chips are partially or wholly in contact with a package molding resin, wherein the radiation curable adhesive layer comprises 100 parts by weight of an acrylic adhesive composed of a copolymer of an acrylic ester and an OH group-containing polymerizable monomer and 50-200 parts by weight of a radiation polymerizable compound having two or more unsaturated bonds, and the radiation curable adhesive layer has an elastic modulus of not less than 1×109 dType: GrantFiled: April 28, 1994Date of Patent: October 2, 2001Assignees: Lintec Corporation, Texas Instruments, Inc.Inventors: Masazumi Amagai, Kazuyoshi Ebe, Hideo Senoo
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Publication number: 20010014492Abstract: A process for producing semiconductor chips, comprising the following steps. A semiconductor wafer having a surface overlaid with circuits is provided. An arrangement wherein a back of the semiconductor wafer is fixed on a dicing tape and wherein a pressure sensitive adhesive double coated sheet is stuck to a circuit surface of the semiconductor wafer is formed. The pressure sensitive adhesive double coated sheet comprises a shrinkable base having its both sides overlaid with pressure sensitive adhesive layers. At least one of the layers is composed of an energy radiation curable pressure sensitive adhesive. The semiconductor wafer together with the pressure sensitive adhesive double coated sheet is diced by each circuit to thereby form semiconductor chips. The semiconductor chips are fixed on a transparent hard plate by adherence of the pressure sensitive adhesive layer of the pressure sensitive adhesive double coated sheet remote from the semiconductor chips.Type: ApplicationFiled: February 6, 2001Publication date: August 16, 2001Applicant: Lintec CorporationInventors: Hayato Noguchi, Kazuyoshi Ebe