Patents by Inventor Kazuyoshi Furukama

Kazuyoshi Furukama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dielectrically isolated semiconductor substrate
    Patent number: 4878957
    Abstract: A dielectrically isolated semiconductor wafer substrate includes first and second semiconductive layers bonded to each other by a direct bonding technique in such a manner that an insulative layer is sandwiched therebetween. The first semiconductive layer is a first silicon layer having a (100) or (110) crystal surface orientation, while the second semiconductive layer is a second silicon layer having a (111) crystal surface orientation. Thereafter, a peripheral portion of the resultant substrate is removed, and a substrate of a slightly smaller size is obtained which is provided with an additionally formed new orientation flat.
    Type: Grant
    Filed: March 30, 1989
    Date of Patent: November 7, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshihiro Yamaguchi, Kiminori Watanabe, Akio Nakagawa, Kazuyoshi Furukama, Kiyoshi Fukuda, Katsujiro Tanzawa