Patents by Inventor Kazuyoshi Matsuura

Kazuyoshi Matsuura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device including a particular dummy terminal
    Patent number: 7894033
    Abstract: Keeping more space for circuit elements on a chip when dummy terminals for reinforcement are located on it for the purpose of load balancing for pressure welding. A semiconductor device 10 used for COG-implementation comprising an output terminals group 12f arrayed in a first pattern close to one end of a chip, and one or more dummy terminals 12d located close to the one end of the chip in a different region from a region where an output terminals group 12f is located and arrayed in a second pattern different from the first pattern. The second pattern has a shortened width. A power supply portion 14 is located longitudinally adjacent to an output terminals group 12f beside the dummy terminals 12d.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: February 22, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Kazuyoshi Matsuura
  • Semiconductor device
    Publication number: 20070096344
    Abstract: Keeping more space for circuit elements on a chip when dummy terminals for reinforcement are located on it for the purpose of load balancing for pressure welding. A semiconductor device 10 used for COG-implementation comprising an output terminals group 12f arrayed in a first pattern close to one end of a chip, and one or more dummy terminals 12d located close to the one end of the chip in a different region from a region where an output terminals group 12f is located and arrayed in a second pattern different from the first pattern. The second pattern has a shortened width. A power supply portion 14 is located longitudinally adjacent to an output terminals group 12f beside the dummy terminals 12d.
    Type: Application
    Filed: October 30, 2006
    Publication date: May 3, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Kazuyoshi Matsuura