Patents by Inventor Kazuyoshi Nishimura

Kazuyoshi Nishimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9025970
    Abstract: A comparator (11) outputs, out of an electrical signal input from a trans impedance amplifier (TIA) via a coupling capacitor, pulses having amplitudes equal to or larger than a reference value as a comparison output signal (Cout). An analog holding circuit (12) charges a holding capacitor with each pulse contained in the comparison output signal (Cout) and also removes a DC voltage obtained by the charging via a discharging resistor, thereby generating a holding output signal (Hout) that changes in accordance with the presence/absence of input of an optical signal. This allows to perform an autonomous operation without any necessity of an external control signal and properly detect the presence/absence of input of an optical signal.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: May 5, 2015
    Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics Corporation
    Inventors: Hiroshi Koizumi, Kazuyoshi Nishimura, Masafumi Nogawa, Yoshikazu Urabe
  • Patent number: 8705680
    Abstract: A recovered clock (123) is generated by making the phase of a reference clock (122) having the same frequency as the data rate frequency of input data (120) match the phase of the input data (120). The input data (120) is written in a FIFO (101) using the recovered clock (123). For readout from the FIFO (101), the FIFO (101) is caused to output recovered data (121) using the reference clock (122) asynchronous to the recovered clock (123).
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: April 22, 2014
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Jun Terada, Yusuke Ohtomo, Kazuyoshi Nishimura, Tomoaki Kawamura, Minoru Togashi, Keiji Kishine
  • Patent number: 8568811
    Abstract: This invention is related to a method of manufacturing a tea drink, which comprises the steps of subjecting tea leaves to extraction to obtain an tea extract and adjusting the pH of the tea extract to the range of 5.0-6.0, mixing nitrogen into the tea extract while applying a negative pressure of 0.01 MPa or more, stabilizing the tea extract in succession to the step of applying a negative pressure by maintaining the tea extract under a pressure of not higher than atmospheric pressure for a period of 30 seconds to 20 minutes, and adjusting the pH of the tea extract to the range of 5.5-6.5 during or subsequent to the step of stabilizing the tea extract.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: October 29, 2013
    Assignee: Ito En, Ltd.
    Inventors: Masami Sasame, Kenji Shimaoka, Yoko Haraguchi, Izumi Kobayashi, Kazuyoshi Nishimura, Hideo Nomura, Ken-ichi Abe, Tetsuya Onuki
  • Publication number: 20130039649
    Abstract: A comparator (11) outputs, out of an electrical signal input from a trans impedance amplifier (TIA) via a coupling capacitor, pulses having amplitudes equal to or larger than a reference value as a comparison output signal (Cout). An analog holding circuit (12) charges a holding capacitor with each pulse contained in the comparison output signal (Cout) and also removes a DC voltage obtained by the charging via a discharging resistor, thereby generating a holding output signal (Hout) that changes in accordance with the presence/absence of input of an optical signal. This allows to perform an autonomous operation without any necessity of an external control signal and properly detect the presence/absence of input of an optical signal.
    Type: Application
    Filed: February 14, 2011
    Publication date: February 14, 2013
    Inventors: Hiroshi Koizumi, Kazuyoshi Nishimura, Masafumi Nogawa, Yoshikazu Urabe
  • Patent number: 8149978
    Abstract: A clock/data recovery circuit includes a data duty correction circuit which outputs corrected data by correcting the duty of input data in accordance with the level of a correction signal, a clock recovery circuit which generates a recovered clock in synchronism with the edge timing of the corrected data, a data decision circuit which performs data decision of the corrected data based on the recovered clock, and a data duty detection circuit which detects the duty of the corrected data based on the recovered clock and outputs the correction signal representing a duty correction amount to the data duty correction circuit.
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: April 3, 2012
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Yusuke Ohtomo, Jun Terada, Kazuyoshi Nishimura, Keiji Kishine
  • Publication number: 20100232558
    Abstract: A recovered clock (123) is generated by making the phase of a reference clock (122) having the same frequency as the data rate frequency of input data (120) match the phase of the input data (120). The input data (120) is written in a FIFO (101) using the recovered clock (123). For readout from the FIFO (101), the FIFO (101) is caused to output recovered data (121) using the reference clock (122) asynchronous to the recovered clock (123).
    Type: Application
    Filed: June 27, 2007
    Publication date: September 16, 2010
    Inventors: Jun Terada, Yusuke Ohtomo, Kazuyoshi Nishimura, Tomoaki Kawamura, Minoru Togashi, Keiji Kishine
  • Publication number: 20100073058
    Abstract: A clock/data recovery circuit includes a data duty correction circuit (400) which outputs corrected data by correcting the duty of input data in accordance with the level of a correction signal, a clock recovery circuit (100) which generates a recovered clock in synchronism with the edge timing of the corrected data, a data decision circuit (200) which performs data decision of the corrected data based on the recovered clock, and a data duty detection circuit (300) which detects the duty of the corrected data based on the recovered clock and outputs the correction signal representing a duty correction amount to the data duty correction circuit.
    Type: Application
    Filed: July 20, 2007
    Publication date: March 25, 2010
    Inventors: Yusuke Ohtomo, Jun Terada, Kazuyoshi Nishimura, Keiji Kishine
  • Publication number: 20090191319
    Abstract: This invention is related to a method of manufacturing a tea drink, which comprises the steps of subjecting tea leaves to extraction to obtain an tea extract and adjusting the pH of the tea extract to the range of 5.0-6.0, mixing nitrogen into the tea extract while applying a negative pressure of 0.01 MPa or more, stabilizing the tea extract in succession to the step of applying a negative pressure by maintaining the tea extract under a pressure of not higher than atmospheric pressure for a period of 30 seconds to 20 minutes, and adjusting the pH of the tea extract to the range of 5.5-6.5 during or subsequent to the step of stabilizing the tea extract.
    Type: Application
    Filed: March 27, 2009
    Publication date: July 30, 2009
    Inventors: Masami Sasame, Kenji Shimaoka, Yoko Haraguchi, Izumi Kobayahsi, Kazuyoshi Nishimura, Hideo Nomura, Ken-ichi Abe, Tetsuya Onuki
  • Patent number: 4655166
    Abstract: In a continuous galvanizing line, oscillation of a steel strip withdrawn from a molten zinc metal bath is prevented by anti-vibration magnets disposed in the vicinity of the respective side edges of the steel strip. The magnets cause tension in the strip in a direction of strip width and amplitude of the oscillation of the strip perpendicular to the strip surfaces is reduced. Also, by magnetic force of the magnet, bending of the running strip is cured and uniform coating is obtained. A gap between the magnet and the strip side edge is automatically controlled by detecting the gap continuously.
    Type: Grant
    Filed: February 1, 1983
    Date of Patent: April 7, 1987
    Assignees: Hitachi, Ltd., Nisshin Steel Co., Ltd.
    Inventors: Kazuyoshi Nishimura, Kenji Tabushi, Tadashi Nishino, Tomoaki Kimura