Patents by Inventor Kazuyoshi Takemura

Kazuyoshi Takemura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080052419
    Abstract: An information apparatus switches a display at a predetermined area which includes at least a part of a portion where an electromagnetic-wave emitting unit used for data communications with a data storage device is disposed, according to data communication processing with the data storage device, and emits sound generated according to the processing at corresponding timing.
    Type: Application
    Filed: September 11, 2007
    Publication date: February 28, 2008
    Inventors: Hiroyuki Oda, Yojiro Kamise, Hisakazu Yanagiuchi, Takayuki Ohnishi, Yuji Morimiya, Kazuyoshi Takemura, Kenji Nakada
  • Patent number: 7333583
    Abstract: An information apparatus switches a display at a predetermined area which includes at least a part of a portion where an electromagnetic-wave emitting unit used for data communications with a data storage device is disposed, according to data communication processing with the data storage device, and emits sound generated according to the processing at corresponding timing.
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: February 19, 2008
    Assignee: Sony Corporation
    Inventors: Hiroyuki Oda, Yojiro Kamise, Hisakazu Yanagiuchi, Takayuki Ohnishi, Yuji Morimiya, Kazuyoshi Takemura, Kenji Nakada
  • Publication number: 20070189432
    Abstract: An information apparatus switches a display at a predetermined area which includes at least a part of a portion where an electromagnetic-wave emitting unit used for data communications with a data storage device is disposed, according to data communication processing with the data storage device, and emits sound generated according to the processing at corresponding timing.
    Type: Application
    Filed: December 21, 2005
    Publication date: August 16, 2007
    Inventors: Hiroyuki Oda, Yojiro Kamise, Hisakazu Yanagiuchi, Takayuki Ohnishi, Yuji Morimiya, Kazuyoshi Takemura, Kenji Nakada
  • Publication number: 20070074137
    Abstract: Provided is a method of verifying the function of the LSI including: a first signal database generating step of registering a first signal data set for associating a first verification target signal of which the operation is defined as the specification of the LSI with a first depended signal group for influencing the operation of the first verification target signal; a second signal database generating step of registering a second signal data set for associating a second verification target signal which is described in a description language for verifying the function of the LSI and is a verification target with a second depended signal group for influencing the operation of the second verification target signal; and a signal database comparing step of comparing the first signal data set with the second signal data set and outputs a difference.
    Type: Application
    Filed: September 27, 2006
    Publication date: March 29, 2007
    Inventors: Yoshihito Nishida, Kazuyoshi Takemura, Masanobu Mizuno, Kazuhito Tada
  • Patent number: 7050526
    Abstract: An information apparatus switches a display at a predetermined area which includes at least a part of a portion where an electromagnetic-wave emitting unit used for data communications with a data storage device is disposed, according to data communication processing with the data storage device, and emits sound generated according to the processing at corresponding timing.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: May 23, 2006
    Assignee: Sony Corporation
    Inventors: Hiroyuki Oda, Yojiro Kamise, Hisakazu Yanagiuchi, Takayuki Ohnishi, Yuji Morimiya, Kazuyoshi Takemura, Kenji Nakada
  • Publication number: 20050283349
    Abstract: According to a method for designing a semiconductor integrated device of the present invention, a simulation process step S1 of the semiconductor integrated device is performed, and transaction data is stored in a transaction data storage process step S2. Subsequently, the transaction data is analyzed in a transaction data analysis process step S3, and a control portion for statically or dynamically controlling an optimal bit width, encoding method, operation frequency and so forth of the bus generated based on the analysis result is generated step S4.
    Type: Application
    Filed: June 9, 2005
    Publication date: December 22, 2005
    Inventors: Kazuyoshi Takemura, Katsuya Shinohara
  • Publication number: 20040243959
    Abstract: A design method for a semiconductor integrated circuit device enabling flexible selection of IPs while securing the functions of a system is provided. The design method of the present invention includes the steps of: (a) storing a plurality of IPs having the same function in a memory for each of a plurality of functions; (b) constructing a function group structure for satisfying a certain specification; and (c) selecting and retrieving one IP from the plurality of IPs having the same function from the memory for each function in the function group structure and substituting the IP for the function in the function group structure.
    Type: Application
    Filed: June 25, 2004
    Publication date: December 2, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Kazuyoshi Takemura
  • Patent number: 6785876
    Abstract: A design method for a semiconductor integrated circuit device enabling flexible selection of IPs while securing the functions of a system is provided. The design method of the present invention includes the steps of: (a) storing a plurality of IPs having the same function in a memory for each of a plurality of functions; (b) constructing a function group structure for satisfying a certain specification; and (c) selecting and retrieving one IP from the plurality of IPs having the same function from the memory for each function in the function group structure and substituting the IP for the function in the function group structure.
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: August 31, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kazuyoshi Takemura
  • Patent number: 6523153
    Abstract: In a design process of an integrated circuit system, an interface model is generated between a behavioral model described at a behavioral level and an RTL model connected to the behavioral model. The interface model includes protocol converter, bit precision converter and signal converter. The protocol converter converts the protocol of the behavioral model, from which the concept of “clock” is absent, into that of the RTL model to time the behavior represented by the behavioral model with clock pulses for the RTL model. The bit precision converter converts the decimal point representations or bit widths of input/output data. And the signal converter converts signal lines or signal values for an input/output signal of the behavioral model. By providing an interface model like this, the overall system can have its design verified.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: February 18, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuyoshi Takemura, Masanobu Mizuno
  • Patent number: 6510541
    Abstract: When a circuit to be designed performs data transmit/receive behavior with other circuits such as a voice codec and a transmitter, not only the circuit to be designed but also the other circuits are provided with test clusters arranged in a hierarchical structure of a specification layer, an behavioral layer, and a function layer as in the VC cluster for the circuit to be designed. The test clusters include data describing the I/O relationship between the circuit to be designed and the other circuits in the specification layer, and data for activating sequence control in the other circuits in the behavioral layer. The VC cluster for the object to be designed includes test clusters for sequence control to be particularized in the function layer. Using the test clusters in the VC cluster, test clusters in the lower-level layer can be generated.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: January 21, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Makoto Fujiwara, Kazuyoshi Takemura
  • Publication number: 20020118099
    Abstract: An information apparatus switches a display at a predetermined area which includes at least a part of a portion where an electromagnetic-wave emitting unit used for data communications with a data storage device is disposed, according to data communication processing with the data storage device, and emits sound generated according to the processing at corresponding timing.
    Type: Application
    Filed: December 21, 2001
    Publication date: August 29, 2002
    Inventors: Hiroyuki Oda, Yojiro Kamise, Hisakazu Yanagiuchi, Takayuki Ohnishi, Yuji Morimiya, Kazuyoshi Takemura, Kenji Nakada
  • Publication number: 20020059554
    Abstract: A design method for a semiconductor integrated circuit device enabling flexible selection of IPs while securing the functions of a system is provided. The design method of the present invention includes the steps of: (a) storing a plurality of IPs having the same function in a memory for each of a plurality of functions; (b) constructing a function group structure for satisfying a certain specification; and (c) selecting and retrieving one IP from the plurality of IPs having the same function from the memory for each function in the function group structure and substituting the IP for the function in the function group structure.
    Type: Application
    Filed: November 2, 2001
    Publication date: May 16, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kazuyoshi Takemura