Patents by Inventor Kazuyoshi Yuki

Kazuyoshi Yuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10679996
    Abstract: A construction of integrated circuitry comprises a structure comprising conductive material having insulative material there-above. The conductive material and the insulative material respectively have opposing sides in a vertical cross-section. A first insulating material is laterally outward of the opposing sides of the conductive material in the vertical cross-section. A second insulating material is laterally outward of the first insulating material in the vertical cross-section. The second insulating material is of different composition from that of the first insulating material. The second insulating material laterally covers a lower portion of the opposing sides of the insulative material in the vertical cross-section. The second insulating material does not laterally cover an upper portion of the opposing sides of the insulative material in the vertical cross-section. A third insulating material is laterally outward of the second insulating material in the vertical cross-section.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: June 9, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Kazuyoshi Yuki, Takayoshi Tashiro
  • Publication number: 20190206876
    Abstract: A construction of integrated circuitry comprises a structure comprising conductive material having insulative material there-above. The conductive material and the insulative material respectively have opposing sides in a vertical cross-section. A first insulating material is laterally outward of the opposing sides of the conductive material in the vertical cross-section. A second insulating material is laterally outward of the first insulating material in the vertical cross-section. The second insulating material is of different composition from that of the first insulating material. The second insulating material laterally covers a lower portion of the opposing sides of the insulative material in the vertical cross-section. The second insulating material does not laterally cover an upper portion of the opposing sides of the insulative material in the vertical cross-section. A third insulating material is laterally outward of the second insulating material in the vertical cross-section.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 4, 2019
    Inventors: Kazuyoshi Yuki, Takayoshi Tashiro
  • Publication number: 20150303200
    Abstract: A semiconductor device comprising: a silicon substrate; an embedded gate electrode groove provided in the silicon substrate; a gate insulating film provided on the wall inside the embedded gate electrode groove; an embedded gate electrode provided on the gate insulating film so as to be installed inside the embedded gate electrode groove, the embedded gate electrode, having a first portion having a titanium nitride film and a first metal film thereon, and a second portion having a single-layer titanium nitride film; and a contact plug electrically connected to the first metal film constituting the first portion of the embedded gate electrode.
    Type: Application
    Filed: September 25, 2013
    Publication date: October 22, 2015
    Inventor: Kazuyoshi Yuki
  • Publication number: 20110012184
    Abstract: A semiconductor memory device including: word lines extending in a Y direction on a semiconductor substrate, the word lines being arranged in an X direction perpendicular to the Y direction and being parallel to one another; active regions each elongating and intersecting with two of the word lines, the active regions being arranged in the Y direction and being parallel to one another on the semiconductor substrate; a capacitance contact plug connected to each end of each of the active regions in the longitudinal direction thereof; a stack lower electrode including a first lower electrode formed on the capacitance contact plug and a second lower electrode formed on the first lower electrode; a capacitance insulating film; and an upper electrode, wherein the center position of the second lower electrode is shifted in a predetermined direction from the center position of the first lower electrode.
    Type: Application
    Filed: July 2, 2010
    Publication date: January 20, 2011
    Applicant: ELPIDA MEMORY, INC.
    Inventor: Kazuyoshi YUKI
  • Patent number: 7713828
    Abstract: A semiconductor device includes a semiconductor substrate, source and drain regions on the semiconductor substrate, and contact plugs connected to the source and drain regions. The contact plugs includes first impurity-diffused epitaxial layers that contact with the source and drain regions.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: May 11, 2010
    Assignee: Elpida Memory, Inc.
    Inventor: Kazuyoshi Yuki
  • Publication number: 20080116583
    Abstract: A semiconductor device includes a semiconductor substrate, source and drain regions on the semiconductor substrate, and contact plugs connected to the source and drain regions. The contact plugs includes first impurity-diffused epitaxial layers that contact with the source and drain regions.
    Type: Application
    Filed: November 15, 2007
    Publication date: May 22, 2008
    Applicant: ELPIDA MEMORY, INC.
    Inventor: Kazuyoshi YUKI