Abstract: An improvement in the quality of wire bonding is achieved by reducing the vibration of a lead frame or a wiring substrate after wire bonding. Over a heat block in a wire bond portion of a wire bonder, there is provided a cooling blower for cooling a wire-bonded matrix frame so that the temperature thereof may decrease stepwise. After wire bonding, cold air is blown from the cooling blower to the matrix frame, and temperature control of the matrix frame is performed so that the temperature of the matrix frame after wire bonding may decrease stepwise. Or, the wire-bonded matrix frame is fixed with a holding tool such as a frame holding member, a guide member, a roller means, or an elastic means until cooling is completed.

Abstract: To provide a technique that can improve the data retention characteristic of an MRAM device by improving the resistance against an external magnetic field in a semiconductor device including the MRAM device. A first magnetic shield material is disposed over a die pad via a first die attach film. Then, a semiconductor chip is mounted over the first magnetic shield material via a second die attach film. Furthermore, a second magnetic shield material is disposed over the semiconductor chip via a third die attach film. That is, the semiconductor chip is disposed so as to be sandwiched by the first magnetic shield material and the second magnetic shield material. At this time, while the planar area of the second magnetic shield material is smaller than that of the first magnetic shield material, the thickness of the second magnetic shield material is thicker than that of the first magnetic shield material.

Abstract: A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 um or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.

Abstract: To provide a technique that can improve the data retention characteristic of an MRAM device by improving the resistance against an external magnetic field in a semiconductor device including the MRAM device. A first magnetic shield material is disposed over a die pad via a first die attach film. Then, a semiconductor chip is mounted over the first magnetic shield material via a second die attach film. Furthermore, a second magnetic shield material is disposed over the semiconductor chip via a third die attach film. That is, the semiconductor chip is disposed so as to be sandwiched by the first magnetic shield material and the second magnetic shield material. At this time, while the planar area of the second magnetic shield material is smaller than that of the first magnetic shield material, the thickness of the second magnetic shield material is thicker than that of the first magnetic shield material.

Abstract: To provide a technique that can improve the data retention characteristic of an MRAM device by improving the resistance against an external magnetic field in a semiconductor device including the MRAM device. A first magnetic shield material is disposed over a die pad via a first die attach film. Then, a semiconductor chip is mounted over the first magnetic shield material via a second die attach film. Furthermore, a second magnetic shield material is disposed over the semiconductor chip via a third die attach film. That is, the semiconductor chip is disposed so as to be sandwiched by the first magnetic shield material and the second magnetic shield material. At this time, while the planar area of the second magnetic shield material is smaller than that of the first magnetic shield material, the thickness of the second magnetic shield material is thicker than that of the first magnetic shield material.

Abstract: A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 um or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.

Abstract: A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 ?m or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.

Abstract: A semiconductor device and a manufacturing method therefor wherein a wire for coupling an inner lead and a semiconductor chip with each other can be prevented from being electrically short-circuited to any other conductive part are provided. An inner lead portion has a tip arranged outside the outer circumferential end of the semiconductor chip as viewed on a plane. A power supply bar has a jutted portion extended between the outer circumferential end of the semiconductor chip and the tip of the inner lead portion as viewed on a plane. The upper face of the jutted portion is in a position lower than the upper face of the tip of the inner lead portion. A bonding wire for electrically coupling the semiconductor chip and the inner lead portion with each other has a bent portion outside the outer circumferential end of the semiconductor chip as viewed on a plane.

Abstract: A semiconductor device comprises: a first and second die pads arranged side by side; a plurality of inner leads arranged around the first and second die pads; first and second chips mounted on the first and second die pads; a bar provided between the first and second chips and the plurality of inner leads, extending in an array direction of the first chip and the second chip; a plurality of wires that connect the first and second chips and the plurality of inner leads and connect the first chip and the second chip; and resin that seals the first and second die pads, the plurality of inner leads, the first and second chips, the plurality of wires and the bar, wherein the bar comprises a mark provided at a position corresponding to an area between the first chip and the second chip in an array direction of the first chip and the second chip.

Abstract: An improvement in the quality of wire bonding is achieved by reducing the vibration of a lead frame or a wiring substrate after wire bonding. Over a heat block in a wire bond portion of a wire bonder, there is provided a cooling blower for cooling a wire-bonded matrix frame so that the temperature thereof may decrease stepwise. After wire bonding, cold air is blown from the cooling blower to the matrix frame, and temperature control of the matrix frame is performed so that the temperature of the matrix frame after wire bonding may decrease stepwise. Or, the wire-bonded matrix frame is fixed with a holding tool such as a frame holding member, a guide member, a roller means, or an elastic means until cooling is completed.

Abstract: A plurality of inner leads 14 are provided around a die pad 13. A grounded GND lead 16 is provided in a region between the die pad 13 and the plurality of inner leads 14. A semiconductor chip 17 and the plurality of inner leads 14 are connected to each other by a plurality of wires 21. The semiconductor chip 17 and the GND lead 16 are connected to each other by GND wires 22. The GND wires 22 are disposed between a plurality of wires 21. The distance between ends of each adjacent pair of the inner leads 14 is 0.2 mm or less.

Abstract: To provide a technique that can improve the data retention characteristic of an MRAM device by improving the resistance against an external magnetic field in a semiconductor device including the MRAM device. A first magnetic shield material is disposed over a die pad via a first die attach film. Then, a semiconductor chip is mounted over the first magnetic shield material via a second die attach film. Furthermore, a second magnetic shield material is disposed over the semiconductor chip via a third die attach film. That is, the semiconductor chip is disposed so as to be sandwiched by the first magnetic shield material and the second magnetic shield material. At this time, while the planar area of the second magnetic shield material is smaller than that of the first magnetic shield material, the thickness of the second magnetic shield material is thicker than that of the first magnetic shield material.

Abstract: A method for manufacturing a magnetic memory chip device is provided with a step of writing information on a plurality of magnetic memory chips formed on a silicon wafer; a step of adhering a high permeability plate, which is composed of a material having permeability higher than that of silicon and has a thickness of 50 ?m or more, on the rear surface of a silicon wafer after writing the information; and a step of dicing the silicon wafer into magnetic memory chips after adhering the high permeability plate.

Abstract: A semiconductor device and a manufacturing method therefor wherein a wire for coupling an inner lead and a semiconductor chip with each other can be prevented from being electrically short-circuited to any other conductive part are provided. An inner lead portion has a tip arranged outside the outer circumferential end of the semiconductor chip as viewed on a plane. A power supply bar has a jutted portion extended between the outer circumferential end of the semiconductor chip and the tip of the inner lead portion as viewed on a plane. The upper face of the jutted portion is in a position lower than the upper face of the tip of the inner lead portion. A bonding wire for electrically coupling the semiconductor chip and the inner lead portion with each other has a bent portion outside the outer circumferential end of the semiconductor chip as viewed on a plane.

Abstract: A semiconductor device comprises: a first and second die pads arranged side by side; a plurality of inner leads arranged around the first and second die pads; first and second chips mounted on the first and second die pads; a bar provided between the first and second chips and the plurality of inner leads, extending in an array direction of the first chip and the second chip; a plurality of wires that connect the first and second chips and the plurality of inner leads and connect the first chip and the second chip; and resin that seals the first and second die pads, the plurality of inner leads, the first and second chips, the plurality of wires and the bar, wherein the bar comprises a mark provided at a position corresponding to an area between the first chip and the second chip in an array direction of the first chip and the second chip.

Abstract: A plurality of inner leads 14 are provided around a die pad 13. A grounded GND lead 16 is provided in a region between the die pad 13 and the plurality of inner leads 14. A semiconductor chip 17 and the plurality of inner leads 14 are connected to each other by a plurality of wires 21. The semiconductor chip 17 and the GND lead 16 are connected to each other by GND wires 22. The GND wires 22 are disposed between a plurality of wires 21. The distance between ends of each adjacent pair of the inner leads 14 is 0.2 mm or less.

Abstract: A semiconductor device includes a substrate, a plurality of bonding fingers formed on the surface of the substrate, and a semiconductor element arranged above the surface of the substrate and having a plurality of connection pads on a surface opposite to a surface facing the substrate. The plurality of connection pads have a connection pad group aligned in the vicinity of a side of the semiconductor element along the same. The plurality of bonding fingers have a bonding finger arranged outside sides adjacent to sides of the semiconductor element along which the connection pad group is arranged. The connection pad group has the connection pad electrically connected to the bonding finger by wire bonding. Therefore, a semiconductor device attaining improved degree of freedom in routing without lowering quality and efficient reduction in its outer dimension is obtained.

Abstract: A semiconductor device includes a substrate, a plurality of bonding fingers formed on the surface of the substrate, and a semiconductor element arranged above the surface of the substrate and having a plurality of connection pads on a surface opposite to a surface facing the substrate. The plurality of connection pads have a connection pad group aligned in the vicinity of a side of the semiconductor element along the same. The plurality of bonding fingers have a bonding finger arranged outside sides adjacent to sides of the semiconductor element along which the connection pad group is arranged. The connection pad group has the connection pad electrically connected to the bonding finger by wire bonding. Therefore, a semiconductor device attaining improved degree of freedom in routing without lowering quality and efficient reduction in its outer dimension is obtained.

Abstract: A semiconductor device includes a first conductive pattern provided on one surface of the substrate; a second conductive pattern provided on the other surface of the substrate; at least two first semiconductor chips mounted on one surface of the substrate, and connected to the first conductive pattern; a second semiconductor chip mounted so as to stride the first semiconductor chips adjacent to each other; and a first wiring passing between the first semiconductor chips adjacent to each other, and through openings formed in the substrate, an end thereof being connected to the surface of the second semiconductor chip facing the substrate, and the other end being connected to the second conductive pattern.

Abstract: In an LOC semiconductor device, a semiconductor chip is fixed on a die pad through a die pad material. A lead including an internal lead extending to the vicinity of a pad provided to the semiconductor chip is put in place. A tape member is placed at positions corresponding to four corners of the semiconductor chip between the internal lead and the semiconductor chip. The tape member is bonded and fixed only to the internal lead but it is not bonded or fixed to the semiconductor chip and merely contacts the surface of the semiconductor chip.